SHF: Small: Collaborative Research: Unified Framework for Adaptive Analog and Digital Performance Characterization Using Learned Information from the Circuit Under Test

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As semiconductor technology scales to make smaller circuits in order to reduce circuit fabrication costs, a by-product is that it is very hard to make circuit components that match specifications exactly. Displacement of a single atom can make the circuit behave differently. The diversity of devices being produced from the same process with the same design makes it un-economical to test them with a "one size fits all" test program. Because each component is unique, we also need a test strategy that is fine-tuned to the circuit being tested. The proposed work involves adjusting the test program to devices under test iteratively as we gather information about each device throughout the testing process. Keeping a leading edge in information technology is essential for the economical and social well being of the nation. Our most advanced technologies produce statistically diverse devices from the same design and manufacturing specification. Future technologies will produce even more diverse devices. Thorough testing of these increasingly complex devices is a key component in maintaining an edge in information technology. This project will explore new testing methodologies by developing methods to enable a shift from static to dynamic test procedures. In addition, this project will pilot a set of undergraduate design projects involving collaboration between Georgia Tech and Arizona State to mimic the prevalent need to collaborate over long distances in industry.