RIA: Statistical Design of Analog and Mixed Signal Circuits

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With the advent of high speed circuits and mixed analog-digital designs, it is important to make sure designs are insensitive to manufacturing process variations. Designs must protect against two types of faults: catastrophic-short and open circuits, and parametric where circuits fail due to parameters deviating too far from their nominal values. This research is on statistical simulation of analog and mixed signal systems. Three research problems are being pursued. First, a SPICE-based macromodeling approach to reducing the simulation time of analog components is being used. An algorithm for finding the best parameters, given the performance needs is being sought. Second, both circuit level and macromodel level statistical process models for analog components are being explored. Algorithms for worst case analysis and for computing parametric yield, which are attuned to the complex parameter models of the analog circuit manufacturing process are being developed. Third, a new catastrophic fault model is the basis of algorithms for efficiently computing catastrophic fault coverage of test sets. From this information catastrophic yield of analog components can be computed.