New Paradigms for Instruction-Level Parallel Processors

这个CAREER建议解决了开发和教学并行级（ILP）的新范例。 静态调度的微体系结构通过将检测和调度ILP的责任交给编译器来实现高性能。 这种方法的缺点包括各代之间缺乏目标代码兼容性，依赖于程序概要文件，以及对单个编译模型的侵蚀。 本研究将发展新的范例为ILP，以消除缺点，招募操作系统，链接器，汇编程序，指令编码和微体系结构。 教育计划将通过开发两门课程介绍编译器在大二和大四课程中的作用：“机器语言编程入门”将被修改，以包括对性能问题和编译器作用的认识;以及高级课程将被开发，以教授后端ILP编译器优化。 该提案的一个重要特点是在ILP的一个基本和技术重要领域培训研究生。 研究和教育活动将使用由首席研究员和他的学生构建的TINKER指令集架构。

This CAREER proposal addresses new paradigms for exploiting and teaching instruction-level parallelism (ILP). Statically-scheduled microarchitectures achieve high performance by relegating to the compiler the responsibility for detecting and scheduling ILP. Drawbacks to this approach include a lack of object code compatibility between generations, the reliance on program profiles, and the erosion of the individual compilation model. This research will develop new paradigms for ILP that remove the draw-backs by enlisting the OS, the linker, the assembler, the instruction encoding and the microarchitecture. The educational plan will introduce the compiler's role in the undergraduate curriculum as the sophomore and senior levels by developing two courses: "Introduction to Machine Language Programming" will be modified to include an awareness of performance issues and the role of the compiler; and a senior level course will be developed to teach back-end ILP compiler optimization. An important feature of this proposal is the training of graduate students in a fundamentally and technologically significant area of ILP. The research and educational activities will use the TINKER Instruction Set Architecture that has been constructed by the principal investigator and his students.