CAREER: Making Asynchronous Design Practical
CAREER: Making Asynchronous Design Practical
批准号:
9702302
负责人:
Venkatesh Akella
金额:
$20.22万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1997
资助国家:
美国
项目状态:
已结题
起止时间:
1997-07-01 至 2001-06-30
中文摘要
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英文摘要
This research is on asynchronous (self-timed) VLSI circuits. High performance design, and testing of self-timed circuits are being investigated. Research focuses on developing tools and methodologies in the following areas. First, a new data transmission scheme for self-timed VLSI systems, the bounded-skew protocol, is being defined. Second, techniques and tools to test self-timed circuits with special emphasis on modeling and testing the actual delays in asynchronous circuits are being developed. Third, methods to reduce power consumption in self-timed circuits by trading concurrency for power and using voltage scaling techniques are being examined. Finally, the potential of asynchronous VLSI design is being demonstrated through implementing prototype VLSI chips in arithmetic and signal processing applications.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
IUCRC Planning Grant UC Davis: Center for Memory System Research (CMEMSYS)
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批准号:2310924
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项目类别:Standard Grant
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资助金额:$2.0万
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财政年份:2023
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负责人:Venkatesh Akella
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依托单位:
CNS Core:Small:A HW/SW Codesign Framework For Dynamic Composition of Disaggregated Hardware Systems Securely
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批准号:2225882
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项目类别:Standard Grant
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资助金额:$59.99万
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财政年份:2022
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负责人:Venkatesh Akella
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依托单位:
CCF: Small: Improving Trace Based Simulation of On-Chip Networks
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批准号:1116897
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项目类别:Standard Grant
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资助金额:$44.88万
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财政年份:2011
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负责人:Venkatesh Akella
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依托单位:
Programmable Architectures for Low Density Parity Check Codes
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批准号:0429154
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项目类别:Continuing Grant
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资助金额:$0.0万
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财政年份:2004
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负责人:Venkatesh Akella
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依托单位:
RIA: High-Level Synthesis of Self-Timed Circuits
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批准号:9308668
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:1993
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负责人:Venkatesh Akella
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依托单位:
国内基金
海外基金
Scalable Learning and Optimization: High-dimensional Models and Online Decision-Making Strategies for Big Data Analysis
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批准号:--
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项目类别:合作创新研究团队
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资助金额:--
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批准年份:2024
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负责人:姚韬
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依托单位: