Research in High-Frequency Analog Electronic Circuits for Communication Systems

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This research is concerned with the creation of new methods of electronic circuit design which will allow realization of smaller size, longer battery life and lower cost in personal communication systems such as cellular telephones, cordless telephones and wireless computer networks. In addition, new transceiver architectures are being investigated which will allow multistandard operation which is transparent to the user. Thus, a single personal communication handset could be used anywhere in the world as it automatically adjusts to different local standards and frequencies. Current implementations of portable transceivers typically use a multi-chip, multi-technology approach with a number of precision external filters, resonators, and other components in order to meet the stringent performance requirement of the analog RF interface in such systems. These transitional approaches severely limit the achievable levels of power dissipation and form factor, and are not compatible with low- cost adaptive multistandard operation. This research is exploring new architectures and circuit techniques which will allow utilization of scaled CMOS VLSI technology to integrate the entire transceiver function with only a few external components. The challenge is to find new approaches that overcome the inherent limitations of integrated passive components such as low Q values in integrated inductors, capacitors and varactors, by utilization of the inherently high bandwidth capabilities of scaled integrated MOS transistors. The investigators expect to demonstrate at the end of this research project a single-chip multistandard RF transceiver incorporating synthesizers, transmit path, power amplifier, and receive path as well as providing interface to several different RF standards. This prototype will be implemented in 0.35 micron CMOS technology.