Built-In Test Mechanisms and Embedded Cores
Built-In Test Mechanisms and Embedded Cores
批准号:
9815229
负责人:
Spyros Tragoudas
金额:
$17.54万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1998
资助国家:
美国
项目状态:
已结题
起止时间:
1998-08-15 至 2000-07-31
中文摘要
9815229该项目是亚利桑那大学(Tragoudas)和南伊利诺伊大学卡本代尔分校(Kagaris)之间的合作项目。该项目正在探索一种设计易于测试的核心的框架。该方法基于识别核心中不相交组件的能力,称为CC(核心组件),没有发布实现细节。网表信息被提供用于核心的剩余部分。 CC必须保证核心的预先设计的知识产权得到保护,并且测试过程得到简化。功能性故障通过使用内建自测试(BIST)或扫描技术初始地隔离测试每个CC来检测。随后,使用扫描技术测试内核的剩余部分,同时绕过CC。 路径延迟故障可能需要对所选CC进行功能级测试。研究的问题是:(1)确定CC的数量、大小、位置以及每个CC内的内建测试机制的类型。(2)开发内建自测试方案和可测性设计方法,以帮助在核心内生成CC。
英文摘要
9815229This project is a cooperative between the University of Arizona (Tragoudas) and Southern illinois University at Carbondale (Kagaris).This project is exploring a framework for designing easily testable cores. The method is based on the ability to identify disjoint components in the core, called CCs (core components),for which no implementation details are released. Netlist information is provided for the remaining portion of the core. The CCs must guarantee that the predesigned intellectual property of the core is protected and that the testing process is simplified. Functional faults are detected by initially testing each CC in isolation using either Built-In Self-Testing (BIST) or scan techniques. Subsequently, the remaining portion of the core is tested using scan techniques while bypassing the CCs. Path delay faults may require functional level testing for the selected CCs. Problems being investigated are: (1) Determining the number, sizes, locations of the CCs, and the type of Built-In Test mechanism within each CC. (2) Developing BIST schemes and DFT methodologies that assist in generating the CCs within the core.
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IUCRC Phase I Southern Illinois University Carbondale: Center for Intelligent, Distributed, Embedded, Applications, and Systems (IDEAS)
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批准号:2231623
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资助金额:$61.0万
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依托单位:
Planning IUCRC Southern Illinois University Carbondale: Center for Networked Embedded, Smart and Trusted Things (NESTT)
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批准号:1822155
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I/UCRC FRP: Collaborative Research: Scalable and Power-Efficient Compressive Sensing CMOS Image Sensors and Reconstruction Circuits
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批准号:1535658
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资助金额:$10.0万
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财政年份:2015
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依托单位:
I/UCRC: Consortium for Embedded Systems - Phase II
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批准号:1361847
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项目类别:Continuing Grant
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资助金额:$16.0万
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财政年份:2014
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I/UCRC FRP: Collaborative Research: Testability and timing analysis in nanoscale designs in the presence of process variations
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批准号:1432026
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:2014
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依托单位:
I/UCRC: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits
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批准号:1230757
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资助金额:$10.0万
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财政年份:2012
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负责人:Spyros Tragoudas
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依托单位:
Collaborative Research: Consortium for Embedded Systems
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批准号:0856039
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项目类别:Continuing Grant
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资助金额:$25.0万
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财政年份:2009
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负责人:Spyros Tragoudas
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依托单位:
CSR: Medium: Collaborative Research: Providing Predictable Timing for Task Migration in Embedded Multi-Core Environments (TiME-ME)
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批准号:0905212
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项目类别:Continuing Grant
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资助金额:$30.5万
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财政年份:2009
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负责人:Spyros Tragoudas
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依托单位:
Collaborative Research: Synthesis, Verification and Testing for Nano-CMOS and Beyond using Threshold Logic
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批准号:0702628
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:2007
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负责人:Spyros Tragoudas
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依托单位:
Collaborative Research: Consortium for Embedded Systems
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批准号:0700757
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项目类别:Standard Grant
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资助金额:$0.0万
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财政年份:2007
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负责人:Spyros Tragoudas
-
依托单位:
Built-In Test Mechanisms and Embedded Cores
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批准号:0096119
-
项目类别:Continuing Grant
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资助金额:$17.3万
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财政年份:1999
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负责人:Spyros Tragoudas
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依托单位:
RIA: Built-In Test Pattern Generation Methods
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批准号:9409905
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:1994
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负责人:Spyros Tragoudas
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依托单位:
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