Test Techniques for Deep Submicron Devices

深亚微米器件的测试技术

• 批准号: 9901099
• 负责人: Kwang-Ting Cheng
• 金额: $ 28.5万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-08-15 至 2003-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9901099&HistoricalAwards=false
• 关键词: Test; Techniques; Deep; Submicron; Devices

This research focuses on developing modeling, analysis and vectorgeneration techniques for some of the emerging deep submicron defects.Specifically, this project is developing techniques to model the excessivepower supply noise, the interconnect crosstalk faults and the resistiveshort and open faults as statistical delay faults. The results of themodeling process are being used to select target delay faults for testevaluation and test generation. This project further investigates vectorgeneration techniques for the selected target delay faults. The tests notonly activate and propagate the faults but also cause various worst-casenoises such that the propagation delay along the sensitized path ismaximized. Furthermore, DFT requirements and rules for eliminating orreducing the probability of having certain noise faults and for simplifyingvector generation for these faults are being explored.

本研究的重点是开发一些新出现的深亚微米缺陷的建模、分析和矢量生成技术。具体而言，本项目正在开发将电源噪声过大、互连串扰故障以及电阻性短路和开路故障建模为统计延迟故障的技术。建模过程的结果用于选择目标延迟故障进行测试评估和测试生成。本项目进一步研究了所选目标延迟故障的矢量生成技术。试验不仅激活和传播故障，而且引起各种最坏噪声，使沿敏化路径的传播延迟最大化。此外，还探讨了消除或降低某些噪声故障概率的DFT要求和规则，以及简化这些故障的向量生成。