SBIR Phase II: In-Situ, Real-Time Process Control for Micro-Electro-Mechanical System (MEMS) Applications

该小型企业创新研究第二阶段项目将开发一种用于微机电系统（MEMS）深蚀刻制造的多应用，低成本，实时工艺监测和控制工具。深蚀刻工艺用于制造高达数百微米厚的高纵横比结构，并有望以较低的成本提供具有更高性能和功能的新器件。 深蚀刻技术中的主要困难是蚀刻深度的控制，目前使用非原位破坏性扫描电子显微镜在蚀刻后测量蚀刻深度。这是非常低效的，是在进行大规模生产之前需要克服的一个主要障碍。在第一阶段，基于FTIR的传感器的设计，建造和安装在顶部的蚀刻室。蚀刻深度和光致抗蚀剂厚度的测量，获得了有史以来第一次，在现场和实时的几个MEMS结构。在第二阶段，将开发和实施分析模型，以测量尽可能广泛的MEMS结构。这些模型将在任何类型的图案上提取多个参数，并将允许传感器用于各种应用，包括硅或SOI（绝缘体上硅）晶片中的深沟槽、膜、厚光刻胶和主流硅应用，如DRAM（动态随机存取存储器）沟槽。硬件将针对光斑尺寸、测量光斑范围、紧凑性进行优化，对于成本敏感的MEMS行业来说，这一点非常重要。 这一项目的结果将是开发一种计量工具，其能力目前尚不具备，而且需求量很大，而且越来越大。 使用拟议计量的具体预期结果如下：（1）通过减少破坏性测量和改进工艺控制来降低成本，（2）通过更好的工艺控制来增加MEMS结构的再现性（运行到运行的准确度目前为~3%，并且预期通过使用传感器而降低到0.5%），（3）为工艺开发提供有用的反馈，从而减少开发时间。 这些结果将对深蚀刻MEMS市场产生重大影响，因为它们将有助于未来的MEMS应用成熟，并通过更便宜的表征和改进的过程控制更快地进入市场。此外，这种首创的实时晶圆状态监测和控制技术将在DRAM等主流半导体加工中得到应用。

This Small Business Innovation Research Phase II project will develop a multiple-applications, low-cost, real-time process monitoring and control tool for micro-electro-mechanical system (MEMS) deep-etch fabrication. Deep-etch processes are used to manufacture high aspect ratio structures up to several hundred microns thick, and promise to deliver new devices with increased performance and functionality at lower cost. A major difficulty in deep-etch technology is the control of the etch depth, which is currently measured post-etch using ex-situ destructive scanning electron microscopy. This is extremely inefficient, and is a major hurdle to be surmounted before extensive production takes place. During Phase I, an FTIR-based sensor was designed, constructed and installed on top of an etcher chamber. Etch depth and photoresist thickness measurements were obtained, for the first time ever, in-situ and in real-time on several MEMS structures. An excellent correlation between the FTIR measurements and SEM measurements was found. During Phase II, analysis models will be developed and implemented to measure the widest possible range of MEMS structures. These models will extract multiple parameters on any type of patterns, and will allow the use of the sensor for various applications, including deep trenches in silicon or SOI (silicon on insulator) wafers, membranes, thick photoresist, and mainstream silicon applications such as DRAM(Dynamic Random Access Memory) trenches. Hardware will be optimized for spot size, measurement spot range, compactness and, very importantly for the cost-sensitive MEMS industry, for cost. The result of this project will be the development of a metrology tool with capabilities currently unavailable, and which are in high and increasing need. The specific anticipated results of the use of the proposed metrology are: (1) to reduce cost through the reduction of destructive measurements and the improvement in process control,(2) to increase the reproducibility of the MEMS structures through better process control (run to run accuracy is currently ~3 % and is expected to be lowered by the use of the sensor to 0.5 %), (3) to provide useful feed-back for process development, thus reducing development time. These results will have a great impact on the deep-etch MEMS market, as they willhelp future MEMS applications to mature and come to market at a faster pace through cheaper characterization and improved process control. In addition, this first-of-a-kind real-time wafer-state monitoring and control technology will lead to applications within mainstream semiconductor processing such as DRAM.