MRI: Acquisition of RF/Mixed Signal Test Equipment for Ultra-High Frequency System-on-Chip Applications

MRI:采购用于超高频片上系统应用的射频/混合信号测试设备

基本信息

  • 批准号:
    0116281
  • 负责人:
  • 金额:
    $ 37万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2001
  • 资助国家:
    美国
  • 起止时间:
    2001-09-01 至 2003-08-31
  • 项目状态:
    已结题

项目摘要

The primary driver of the information revolution is advanced silicon processing. Consequently, system design is undergoing a fundamental change, moving from multiple chip solutions to system-on-a-chip (SOC) solutions. However, as was noted in the National Science Foundation's recent planning workshops on advanced VLSI systems, the testing and measurement thoery and practice related to these heterogeneous resources integrated into a SoC solution is a major unsolved problem that could greatly limit future advances.The advancements in process technologies provide for radically new types of devices, with commensurate design challenges and test and measurement needs. An example of such a system currently under development at the UW is a human/machine transducer chip-Universal Transducer Chip, a single integrated system capable of providing a speech recognition interface to a ubiquitous wireless network. Such a system is likely to become the standard interface modality for a wide range of new applications, from smart homes and smart test benches to ubiquitous high-performance computing fabrics. However, to achieve this potential, there are multiple test and measurement issues that must be addressed:o Radio frequency transceivers must be tested and characterized in the ISM (2.4GHz) and UNfl (5.6-5.8GHz) frequency bands for a broad range of emerging wireless standardso Low power, high performance wireless hardware implementations must be tested and measurement techniques must be developed and validated for future SoC applications in the LMDS bands at 17GHz, and aboveo Heterogeneous single-chip integration and test and measurement must be supported, allowing for the fabrication of RF, analog, high performance digital, and re-configurable subsystems within a single piece of siliconThe infrastructure contained in this proposal enables an investigation into the future of testing and measuring ultra-high-frequency SoC systems, years in advance of their commercialization. We will seek to develop and demonstrate a test and measurement methodology that can provide the benefits of multiple different resource types for numerous design domains. As an initial driver of these efforts, we will characterize a Human/Machine transducer chip, seeking to guide the development of future system-on-a-chip design and test methodologies. It is generally representative of future SoC systems that will operate at ever higher frequencies with ever-increasing levels of complexity. To support the design of such cutting-edge silicon systems, we will develop innovative techniques to handle numerous test issues:o Validation of techniques for integrating RF and Analog components into future ultra-low-voltage SoC designs.o Validation of high-performance, power efficient digital logic families for supporting these systems.o Integrated testing methodologies for complex, heterogeneous systems that can provide complete system test through an optimum combination of on-chip and off-chip ultra-high-frequency test environments.In addition to the development of new approaches for testing and measuring SoC chip designs, we will also develop innovative techniques for educating future high-frequency SoC designers. By providing an integrated curriculum including high-frequency test and measurement, along with a just-in-time learning environment, we will help create system architects capable of harnessing these radically new design techniques and opportunities.
信息革命的主要驱动力是先进的硅处理。因此,系统设计正在经历根本性的变化,从多芯片解决方案转向片上系统(SOC)解决方案。然而,正如美国国家科学基金会最近关于先进超大规模集成电路系统的规划研讨会所指出的那样,与集成到SoC解决方案中的这些异构资源相关的测试和测量理论和实践是一个未解决的主要问题,可能会极大地限制未来的进步。这种系统的一个例子,目前正在开发中的UW是一个人/机传感器芯片通用传感器芯片,一个单一的集成系统,能够提供一个语音识别接口的无处不在的无线网络。这样的系统很可能成为一系列新应用的标准接口模式,从智能家居和智能测试台到无处不在的高性能计算结构。然而,为了实现这一潜力,必须解决多个测试和测量问题:o射频收发器必须在ISM中进行测试和表征(2.4GHz)和UNfl(5.6-5.8GHz)频段,适用于广泛的新兴无线标准。因此,必须测试低功耗、高性能无线硬件实现,并开发和验证测量技术,以用于17 GHz及以上LMDS频段的未来SoC应用。必须支持异构单芯片集成以及测试和测量,以便制造RF、模拟、高性能数字、和可重新配置的子系统在一片硅片中本提案中包含的基础设施使人们能够在超高频SoC系统商业化之前数年对测试和测量的未来进行调查。我们将寻求开发和展示一种测试和测量方法,可以为众多设计领域提供多种不同资源类型的好处。作为这些努力的最初驱动力,我们将描述人/机传感器芯片,寻求指导未来系统级芯片设计和测试方法的发展。它通常代表了未来的SoC系统,这些系统将以越来越高的频率运行,复杂程度也越来越高。为了支持这种尖端硅系统的设计,我们将开发创新技术来处理众多测试问题:o验证将射频和模拟元件集成到未来超低电压SoC设计中的技术。o验证支持这些系统的高性能、低功耗数字逻辑系列。o针对复杂、异构系统的集成测试方法,通过片上和片外超高频测试环境的最佳组合,提供完整的系统测试。除了开发测试和测量SoC芯片设计的新方法外,我们还将开发创新技术,用于教育未来的高频SoC设计师。通过提供包括高频测试和测量在内的综合课程,沿着及时的学习环境,我们将帮助创建能够利用这些全新设计技术和机会的系统架构师。

项目成果

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David Allstot其他文献

Noise considerations for mixed‐signal RF IC transceivers
  • DOI:
    10.1023/a:1019123132222
  • 发表时间:
    1998-01-01
  • 期刊:
  • 影响因子:
    2.100
  • 作者:
    Sayfe Kiaei;David Allstot;Ken Hansen;Nishath K. Verghese
  • 通讯作者:
    Nishath K. Verghese

David Allstot的其他文献

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{{ truncateString('David Allstot', 18)}}的其他基金

EAGER: Ultra-low-power, Universal, Multi-rate Bio-signal Transceiver SoC for Medical Diagnosis and Brain-Machine Interface Applications
EAGER:用于医疗诊断和脑机接口应用的超低功耗、通用、多速率生物信号收发器 SoC
  • 批准号:
    0951368
  • 财政年份:
    2009
  • 资助金额:
    $ 37万
  • 项目类别:
    Standard Grant
ITR: Heterogeneous System Integration in System-on-a-Chip Designs
ITR:片上系统设计中的异构系统集成
  • 批准号:
    0086032
  • 财政年份:
    2000
  • 资助金额:
    $ 37万
  • 项目类别:
    Continuing Grant
Current-Mode Integrated Circuits for CMOS Mixed-Mode VLSI
用于 CMOS 混合模式 VLSI 的电流模式集成电路
  • 批准号:
    9114515
  • 财政年份:
    1992
  • 资助金额:
    $ 37万
  • 项目类别:
    Standard Grant
INGAAS/GAAS Pseudomorphic Hemts for High Speed Circuit Applications
用于高速电路应用的 INGAAS/GAAS 赝晶 Hemt
  • 批准号:
    8821639
  • 财政年份:
    1989
  • 资助金额:
    $ 37万
  • 项目类别:
    Continuing Grant
Engineering Initiation Award: GaAs Analog Integrated Circuits for Data Acquisition
工程启动奖:用于数据采集的砷化镓模拟集成电路
  • 批准号:
    8709158
  • 财政年份:
    1987
  • 资助金额:
    $ 37万
  • 项目类别:
    Continuing Grant

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