Current-Mode Integrated Circuits for CMOS Mixed-Mode VLSI

这项研究为电流模式(I模式)模拟集成电路提出了几个新的方向。I模式电路可能使用低电源电压在高频下工作，因为它们处理的是电流而不是传统或开关电容信号处理电路中的电压。此外，I模式电路不需要精密的线性浮动电容，因此在新兴的亚微米数字CMOS和/或BiCMOS技术中实现混合模式信号处理系统非常有吸引力。在基本模拟信号处理模块的设计中考虑了几种高速高精度电流模式技术，重点是开发适合于使用降低电源电压的数字IC技术来实现的技术。采用了一种高增益通用全差分电流模式运算放大器拓扑结构，并在一个应用中将其扩展为实现具有与开关电容滤波器相当的精度的全差分开关电流滤波器。文中还提出了几种时钟馈通消除方案。最后，将使用一种新的高频连续时间电流模式滤波技术。超过100 MHz的频率似乎可以使用2微米的cmos技术，而更高的频率可能使用更先进的cmos和/或Bicmos技术。

This research advances several new directions for current-mode (I- mode) analog integrated circuits. I-mode circuits potentially operate at high frequencies using low power supply voltages because they process current rather than voltage as in conventional or switched-capacitor signal processing circuits. Moreover, I-mode circuits do not require precision linear floating capacitors, and are therefore very attractive for implementing mixed-mode signal processing systems in the emerging submicron digital CMOS and/or BiCMOS technologies. Several high-speed high-accuracy current-mode techniques are considered in the design of a basic analog signal processing block with emphasis on developing techniques suitable for implementation with digital IC technologies using a reduced supply voltage. A high-gain universal fully differential current mode operational amplifier topology is being used and, in one application, is extended to implement fully differential switched-current filters with accuracy comparable to switched-capacitor filters. Several clock-feedthrough cancellation schemes are also suggested. Finally, a new high-frequency continuous time current-mode filtering technique will be used. Frequencies exceeding 100 MHZ appear feasible using a 2 um CMOS technology with higher frequencies possible using more advanced CMOS and/or BiCMOS technologies.