ITR: Heterogeneous System Integration in System-on-a-Chip Designs

ITR：片上系统设计中的异构系统集成

• 批准号: 0086032
• 负责人: David Allstot
• 金额: $ 400万
• 依托单位: University of Washington
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-09-15 至 2007-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0086032&HistoricalAwards=false
• 关键词: ITR; Heterogeneous; System; Integration; Chip

This project studies the integration of heterogeneous resources into a system-on-chip (SOC) solution. Heterogeneous SOC integration supports the fabrication of RF, analog, high performance digital, and re-configurable subsystems within a single piece of silicon, and includes issues of simulation, design, integration, test, and education. An example SOC is a human/machine transducer chip that provides a speech recognition interface to a ubiquitous wireless network. Such a system represents a standard interface modality. Multiple topics are being researched including low-power speaker identification, speech processing algorithms, and hardware implementations. Low power, high performance wireless protocols are also being developed to support the asymmetric communication loads, sending low bandwidth control messages produced from the recognized speech and receiving high-bandwidth information return for visual, audio, and other feedback to the user.

本计画研究将异质性资源整合至系统晶片（SOC）解决方案。异构SOC集成支持在单片硅内制造RF、模拟、高性能数字和可重新配置的子系统，并且包括仿真、设计、集成、测试和教育问题。示例SOC是向无处不在的无线网络提供语音识别接口的人/机换能器芯片。这样的系统代表标准接口模态。多个主题正在研究中，包括低功耗说话人识别，语音处理算法和硬件实现。低功率、高性能的无线协议也正在被开发以支持不对称的通信负载，发送从识别的语音产生的低带宽控制消息，并且接收高带宽信息返回以用于对用户的视觉、音频和其他反馈。