Chip-Package Co-Design Methodology for Integrated RF Microsystems

集成射频微系统的芯片封装协同设计方法

• 批准号: 0120308
• 负责人: P. Mukund
• 金额: $ 30.61万
• 依托单位: Rochester Institute of Tech
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2001
• 资助国家: 美国
• 起止时间: 2001-09-15 至 2004-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0120308&HistoricalAwards=false
• 关键词: Chip; Package; Co; Design; Methodology

The research aims to develop a chip-package co-design methodology using System on a Chip and System on a Package technologies. This is necessary to span multiple domains both in technology and circuitry in integrated RF microsystems. These systems include RF, analog and digital circuits and are sensitive to the constraints imposed by each domain on the other domains and the package. Most systems are currently being designed in CMOS technology and are driven by the requirements of the digital domain. This research will be conducted in three phases. In the first phase of this project, limits of RF circuit performance will be investigated. The constraints of the digital physical design environment on Rf circuit design will also be examined. In the second phase, emerging technologies such as Copper metal layers and deposition of Ferrite material will be studied for RF passive components, and compared with standard Al metal technology. In the third phase, a co-design methodology will be developed for the chip and the package, that includes component optimization, floor planning and routing. The developed methodology will be used on a test bed that will be fabricated and tested. The RIT collaboration with Georgia Tech brings expertise in microsystems science and engineering together with design, modeling and characterization of electronic packaging. Graduate students and undergraduates will benefit from the breadth of the research collaboration that includes the synthesis of chip design and packaging, and the advances in integrated RF microsystems

本研究旨在发展一种利用系统级芯片与系统级封装技术的芯片封装协同设计方法。这对于跨越集成RF微系统中的技术和电路的多个领域是必要的。这些系统包括RF、模拟和数字电路，并且对每个域对其他域和封装施加的约束敏感。目前，大多数系统都采用CMOS技术设计，并受数字域要求的驱动。这项研究将分三个阶段进行。在该项目的第一阶段，将调查RF电路性能的限制。数字物理设计环境对射频电路设计的约束也将被检查。在第二阶段，将研究用于RF无源元件的铜金属层和铁氧体材料沉积等新兴技术，并与标准铝金属技术进行比较。在第三阶段，将为芯片和封装开发一种协同设计方法，包括元件优化、平面规划和布线。所开发的方法将被用于将被制造和测试的测试台。RIT与格鲁吉亚技术公司的合作带来了微系统科学和工程方面的专业知识，以及电子封装的设计、建模和表征。研究生和本科生将受益于广泛的研究合作，包括芯片设计和封装的综合，以及集成射频微系统的进步