Research for Mixed Signal Electronic Technologies: A Joint Initiative Between NSF and SRC: Pipelined Data Converter Design Strategies for Sub-100nm Processes

点击翻译按钮获取中文摘要

Analog to Digital Converters (ADCs) are one of the key components that are needed in many integrated circuits today and the application and demand for the converters will only accelerate throughout the next decade as applications expand and the ability to put large systems on a chip becomes reality. Paralleling and enabling this growing demand is an evolution in semiconductor technology with processes that have a continued shrinking of feature sizes and supply voltages. Although these evolutions are providing dramatic speed and transistor density improvements in most digital circuits, they are presenting increasing challenges for realizing analog and mixed-signal functions and the two decade-old strategy of using the same basic circuit structures to implement key functional blocks such as the analog to digital converter will no longer be successful in the sub-100nm processes that are now under development.This research is focused on developing design methodologies that can be used to design high-performance analog to digital converters in sub-100nm semiconductor processes in which not only the supply voltages are decreasing but also the gain characteristics of the basic transistor are deteriorating. The three major initiatives in the project are a) developing techniques for building fast high-gain operational amplifiers that can operate with very low supply voltages, b) developing built-in self-calibration and built-in self-test algorithms for pipelined data converters, and c) incorporating these results into a prototype converter than will be fabricated in a fine resolution process so that the theoretical performance characteristics can be experimentally validated.The low voltage operational amplifiers should find applications in sub-100nmprocesses well beyond their use in pipelined data converters. The self-calibration strategy is based upon treating the pipelined data converter as a system, which is identified through the use of a dedicated digital signal processing block. This approach will provide for yield enhancement and will inherently provide capability for built-in self-test which will be of increasing importance as increasingly complex analog and mixed-signal functions become deeply embedded in large single-chip systems.