Collaborative Research: High-Performance Time-Interleaved Analog-to-Digital Converter Design with Digitally Assisted Calibration for Low-Power Broadband Applications

合作研究：针对低功耗宽带应用的具有数字辅助校准功能的高性能时间交错模数转换器设计

• 批准号: 1509538
• 负责人: Randall Geiger
• 金额: $ 22.75万
• 依托单位: Iowa State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-08-01 至 2019-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1509538&HistoricalAwards=false
• 关键词: Collaborative; Research; Performance; Time; Interleaved

The wireless communications industry has experienced exceptional growth in the past decade resulting in sleek low-power handheld devices with multi-purpose functionality such as text-messaging, voice communications, social networking, on-line shopping, internet browsing, interactive TV, and mobile video blogging. Around 3 billion people currently use these smart handheld devices and demand is expected to grow substantially in years to come. Though the functionality these devices provide is phenomenal and far exceeds what most envisioned even a few years ago, the anticipated capabilities of next-generation devices will far eclipse what is available today. A critical component in these devices is an analog-to-digital converter (ADC) that converts radio frequency analog signals into digital signals that can be processed by powerful processors which serve as the brain of smart devices. This research project focuses on the design of next-generation, self-testing ADCs that have superior performance and can operate at extremely low power levels. This will extend the time between recharging of batteries in handheld devices. The significance of this work is in providing a key component necessary for the future development of smart handheld devices. The expected outcome of this research is advanced ADC designs with enhanced performance and reliability while reducing power dissipation and increasing battery life.The trend in handheld personal communication platforms is to digitize the entire spectrum thereby allowing implementation of all radio functions in software. Next-generation receivers for handheld personal communication platforms will require very broadband analog-to-digital converters (ADCs) with both high resolution and low power consumption. This work focuses on the development of ADCs for radio frequency receivers with unmatched power efficiency and performance. The goal of this research is to introduce a practical method for realizing broadband ADCs for wireless communication systems with superior resolution and low power characteristics. To achieve this goal, five objectives have been established: 1) Develop a low-power high-resolution broadband time-interleaved hybrid successive approximation register (SAR)/pipelined architecture through the co-development of circuit structures and calibration techniques; 2) Develop a sub-ADC structure with inherent absence of non-recoverable errors suitable for at-speed background calibration of linear, nonlinear, and timing errors; 3) Develop a phase clock generator architecture with fine-phase digital control enabling accurate timing skew calibration; 4) Develop a background at-speed calibration algorithm that achieves optimal joint gain/offset/discontinuity/nonlinearity/phase-skew calibration; and 5) Design, fabricate, and test a prototype hybrid time-interleaved background-calibrated broadband ADC in a state-of-the-art process to experimentally verify performance potential of this approach. In terms of broader impacts, this research will have significant impact on efficiency, reliability, and production costs of electronic devices and will contribute to ensuring the sustainable growth of the consumer electronics industry. Graduate and undergraduate students from underrepresented groups will be recruited and mentored under this project.

无线通信行业在过去十年中经历了惊人的增长，催生了具有多种用途功能的时尚低功耗手持设备，例如文本消息、语音通信、社交网络、在线购物、互联网浏览、互动电视和移动视频博客。 目前约有 30 亿人使用这些智能手持设备，预计未来几年需求将大幅增长。尽管这些设备提供的功能是惊人的，甚至远远超出了几年前大多数人的想象，但下一代设备的预期功能将远远超过当今可用的功能。 这些设备中的一个关键组件是模数转换器 (ADC)，它将射频模拟信号转换为可由充当智能设备大脑的强大处理器处理的数字信号。 该研究项目重点关注下一代自测试 ADC 的设计，这些 ADC 具有卓越的性能并且可以在极低的功耗水平下运行。 这将延长手持设备电池充电的时间间隔。这项工作的意义在于为智能手持设备的未来发展提供了必要的关键组件。 这项研究的预期成果是先进的 ADC 设计，具有增强的性能和可靠性，同时降低功耗并延长电池寿命。手持式个人通信平台的趋势是数字化整个频谱，从而允许在软件中实现所有无线电功能。用于手持个人通信平台的下一代接收器将需要具有高分辨率和低功耗的宽带模数转换器 (ADC)。这项工作的重点是开发具有无与伦比的功率效率和性能的射频接收器 ADC。 本研究的目标是介绍一种实用方法，用于实现具有卓越分辨率和低功耗特性的无线通信系统宽带 ADC。 为实现这一目标，制定了五个目标： 1）通过电路结构和校准技术的共同开发，开发低功耗高分辨率宽带时间交错混合逐次逼近寄存器（SAR）/流水线架构； 2) 开发一种固有不存在不可恢复误差的子ADC结构，适用于线性、非线性和定时误差的全速后台校准； 3) 开发具有精细相位数字控制的相位时钟发生器架构，实现精确的时序偏差校准； 4) 开发后台实时校准算法，实现最佳联合增益/偏移/不连续性/非线性/相位偏移校准； 5) 采用最先进的工艺设计、制造和测试混合时间交错背景校准宽带 ADC 原型，以通过实验验证该方法的性能潜力。 就更广泛的影响而言，这项研究将对电子设备的效率、可靠性和生产成本产生重大影响，并将有助于确保消费电子行业的可持续增长。 该项目将招募和指导来自代表性不足群体的研究生和本科生。