Research Initiation: Zero Droop S/H Circuits for On-Chip Tuning and Control of Analog Integrated Circuits

研究启动：用于模拟集成电路片上调谐和控制的零下降 S/H 电路

• 批准号: 8809365
• 负责人: Randall Geiger
• 金额: $ 6.6万
• 依托单位: Texas A&M Research Foundation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1988
• 资助国家: 美国
• 起止时间: 1988-09-01 至 1991-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8809365&HistoricalAwards=false
• 关键词: Research; Initiation; Zero; Droop; Circuits

State-of-the-art high-performance analog circuits try to correct inherent mismatching, inaccuracy, and randomness of analog devices by employing signal processing methods known as error correction or tuning techniques. In these techniques, compact on-chip zero-droop sample-and-hold (S/H) amplifiers improve tuning performance by memorizing tuning information between tuning intervals in a stable and accurate way. A compact and stable zero-droop S/H amplifier is being studied and will be integrated in a standard CMOS technology. A systematic study of this class of algorithms will also be undertaken with the purpose of addressing stability, speed, and convergence questions.

最先进的高性能模拟电路试图纠正 模拟的固有失配、不准确性和随机性 通过采用称为误差的信号处理方法 校正或调谐技术。 在这些技术中， 片内零下垂采样保持（S/H）放大器改进 通过记忆调节信息来调节性能， 以稳定和准确的方式调整间隔。 紧凑且 一个稳定的零下垂S/H放大器正在研究中，并将 集成在标准CMOS技术中。 较系统地表明 这类算法也将采用 解决稳定性、速度和收敛性的目的 问题.