Research Initiation: Zero Droop S/H Circuits for On-Chip Tuning and Control of Analog Integrated Circuits

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State-of-the-art high-performance analog circuits try to correct inherent mismatching, inaccuracy, and randomness of analog devices by employing signal processing methods known as error correction or tuning techniques. In these techniques, compact on-chip zero-droop sample-and-hold (S/H) amplifiers improve tuning performance by memorizing tuning information between tuning intervals in a stable and accurate way. A compact and stable zero-droop S/H amplifier is being studied and will be integrated in a standard CMOS technology. A systematic study of this class of algorithms will also be undertaken with the purpose of addressing stability, speed, and convergence questions.