Research for Mixed Signal Electronic Technologies: A Joint Initiative Between NSF and SRC: Optimal Double-Gate MOSFET Structure for Mixed-signal Circuits

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0120328KanThis proposal focuses on investigating innovative circuits based on double-gate MOSFET structures in the mixed-signal environment. The research efforts will establish a whole suite of knowledge on circuit design, device modeling, device design, and device fabrication for optimal performance and reliable operations in the deep submicron double-gate MOSFET technology. The comprehensive aspects from circuit to fabrication will not only provide a thorough understanding of the mixed-signal circuit design trade-off, but also will enable a balance development for graduate and undergraduate students participating in the program.Initial scaling studies on double-gate MOSFET device design has been performed by analytical solutions and the full-2D electrostatic solver. Design variables such as channel length, Si film thickness, gate oxide thickness, and contact work functions will be selected according to different benchmark in circuit applications. The static coupling between the two channels can be maximized or minimized, the dynamic coupling can be tuned to fit the circuit operations. Steep subthreshold slope including DIBL (drain-induced barrier lowering) consideration can be achieved through appropriate design consideration on quantum-mechanical effects. Novel Schottky S/D contact technology by the PI's group will be employed and evaluated in the overall device operations and circuit requirements. This modeling study will serve as the scaling guidelines for device and process design.Simultaneously with the fabrication process development of double-gate CMOS technology, pre-Si prediction of device parameters will be obtained from detailed modeling and scaling studies based on experimental measurement on the larger devices with similar structures. A scalable compact model for double-gate CMOS will be developed based on the preliminary analytical and numerical solutions. The predicted parameter set and the scalable device model will enable early analysis of mixed-signal circuit design, which will in turn give directives to fabrication process trade-off. Novel mixed-signal circuits will be constructed using the tight (no contact parasitic) and fast (down to 0.1ps, i.e., 10THz, limited by either the dielectric relaxation time or carrier transit time of carriers travelling between two channels) coupling between the two MOS structures.The PI expects that this task will result in new low-voltage circuit topologies that exploit both gates of the double-gate MOSFET to achieve high-performance operation with low power consumption. He also expects to determine a great deal about how the double-gate MOSFET structure can be optimized for different circuit applications.Innovative ClaimsNovel mixed-signal circuit functionality can be obtained from using the tight and fastcoupling between the two gates of the proposed structure.Methodology for device and circuit co-design can be demonstrated through double-gateMOSFET analog and mixed-signal circuits. Novel low-voltage, low-power mixed-signal circuits with high performance can be designed utilizing the unique double-gate structure of the proposed devices.