PECASE: Self-assembly Processes for Practical Nano-scale Electronic Devices and Interconnect

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Edwin C. KanECS-9985062The purpose of this proposal is to develop the nano-scale self-assembly processes for electronic devices and interconnect. Novel multi-element modules for logic and memory, created by integrating advanced CMOS technology and self-assembly processes, will be designed, fabricated, characterized and optimized for functionality and performance beyond the current lithography limit. Process development will focus on the surface interaction and perturbation that affects the physical mechanism of self-assembly and Ostwald ripening. Two major components to facilitate timely penetration of research to education will be implemented. This is critical for semiconductor research due to the very short life cycle in technology development. First, the open architecture in simulation software will enable graduate and undergraduate students to learn new research models with full numerical functionality and to exchange modules with other for comparison on the same platform.Second, new research trends will help determine core course content and streamline course series to enhance learning efficiency.