课题基金 / 基金详情

US-India Cooperative Research: A New Approach to Boolean Division that can Trade Performance for Computation

US-India Cooperative Research: A New Approach to Boolean Division that can Trade Performance for Computation
美印合作研究:一种可以用性能换取计算能力的布尔除法新方法
批准号:
0134537
负责人:
Sharad Seth
金额:
$1.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2002
资助国家:
美国
项目状态:
已结题
起止时间:
2002-03-01 至 2006-02-28

项目摘要

项目成果

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中文摘要
翻译
描述:该奖项支持美印合作研究:一种新的布尔除法方法,可以用性能换取计算。美国PI Shared Seth、内布拉斯加州大学林肯分校(UNL)、Somenath Biswas、印度理工学院坎普尔分校(IITK)和他们的两名研究生将合作解决微电子设计自动化中的一个重要逻辑综合问题。研究人员将使用布尔除法将一个大电路分解成三个较小的电路来计算两个较小的电路。目标是开发一种最佳路径技术,使用近似算法来权衡性能与时间。研究人员将设计并实现一个单一的系统,使用户能够控制计算效率和输出质量之间的权衡。所提出的研究结果可广泛应用于多电平超大规模集成电路的合成。范围:该项目将通过UNL和印度理工学院(IITK)之间的高级科学家和研究生交流来加强美国的基础设施。IITK是印度最重要的计算机科学研究所之一。学生们将在印度举办的大型集成电路设计会议上展示研究成果;pi将在档案期刊上发表最终文件。国际科学与工程办公室和印度科学技术部(DST)在NSF/DST联合项目下支持这项活动。
英文摘要
0134537Seth Description: This award supports the US-India Cooperative Research: A New Approach to Boolean Division that can Trade Performance for Computation. US PI Shared Seth, University of Nebraska-Lincoln (UNL), Somenath Biswas, Indian Institute of Technology, Kanpur (IITK) and two of their graduate students will collaborate on solving an important logic synthesis problem in microelectronic design automation. The investigators will decompose a large circuit into three smaller ones by using Boolean division to compute the two smaller circuits. The objective is to develop a best path technique using approximate algorithms that trade-off performance with time. The researchers will design and implement a single system that enables users to control the trade-off between computational efficiency and quality of output. The results of the proposed research may find extensive use in multilevel Very Large-Scale Integrated (VLSI) circuit synthesis. Scope: This project will enhance US infrastructure through the exchange of senior scientists and graduate students between UNL and IITK, one of India's foremost institutes for computer science. The students will present findings at a well-established VLSI design conference in India; the PIs will publish final documentation in an archival journal. The Office of International Science & Engineering and the Indian Department of Science and Technology (DST) support this activity under the NSF/DST joint program.
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DC:Small: ProActive: A RAID Protection Activator for High Availability
  • 批准号:
    0916859
  • 项目类别:
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  • 资助金额:
    $47.47万
  • 财政年份:
    2009
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  • 依托单位:
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    0937993
  • 项目类别:
    Standard Grant
  • 资助金额:
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  • 财政年份:
    2009
  • 负责人:
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  • 依托单位:
A Unified Approach to Testing and Verification of Designs Synthesized from High-Level Specifications
  • 批准号:
    9971167
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    Continuing Grant
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    $29.88万
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  • 负责人:
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  • 依托单位:
Quality vs. Cost Tradeoffs in VLSI Testing: An Empirical Analysis of Sematech Test Data
  • 批准号:
    9806795
  • 项目类别:
    Standard Grant
  • 资助金额:
    $11.55万
  • 财政年份:
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  • 负责人:
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  • 依托单位:
海外基金