Fault Diagnosis for Yield Improvement and Silicon Debug

用于提高良率和芯片调试的故障诊断

• 批准号: 0306296
• 负责人: Tracy Larrabee
• 金额: $ 30万
• 依托单位: University of California-Santa Cruz
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-08-01 至 2008-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0306296&HistoricalAwards=false
• 关键词: Fault; Diagnosis; Yield; Improvement; Silicon

Manufacturing semiconductors is hard, making them work right is even harder, and making them work right the first time you turn them on is damn near impossible. This difficult situation is caused by two strongly competing trends: the astounding and ever-increasing complexity of modern chips, and the ever-greater time-to-market demands of the modern technology product cycle. You can take some time and make a highly complex product, or you can make a simple product quickly, but it is extremely hard to make a highly-complex product very quickly. Unfortunately, this is exactly the dilemma faced by today's semiconductor companies.We can't do anything about these market trends, and profitable products will always be complex and hard to build. But, we can do something about the daunting task of figuring out what is wrong with a many-million-transistor circuit that simply refuses to operate properly. This is where our work on fault diagnosis and silicon debug comes in.We are working on ways of quickly but accurately determining the root cause of failure on a defective chip, even when many independent errors contribute to a single bad result. We have developed algorithms that analyze the way a circuit fails, and then use information about the circuit itself to infer the most likely cause of failure. We consider many types of circuit failure, from logic errors to intermittent or timing failures, and are targeting a range of defect mechanisms from common fabrication errors to complex and exotic defect scenarios. We are building tools that will be compatible with industry-standard data formats and toolflows so that our work can have immediate industrial benefit.The goal of our research is to develop sophisticated but efficient algorithms that can deal with the enormous variety of ways that a modern chip can fail. Good diagnosis and debug tools are necessary if the semiconductor industry is to pursue its (nearly) impossible task of producing of higher-quality products at less expense and an ever-shorter time-to-market.

制造半导体很难，让它们正常工作就更难了，而让它们在你第一次打开它们的时候就正常工作几乎是不可能的。这种艰难的局面是由两个相互竞争的趋势造成的：现代芯片令人震惊的日益复杂的复杂性，以及现代技术产品周期对上市时间的越来越大的要求。你可以花一些时间来制造一个高度复杂的产品，或者你可以快速制造一个简单的产品，但要快速制造一个高度复杂的产品是极其困难的。不幸的是，这正是当今半导体公司面临的两难境地。我们对这些市场趋势无能为力，有利可图的产品总是复杂而难以打造的。但是，对于一项艰巨的任务，我们可以做些什么，那就是找出一个数百万晶体管电路的问题所在，而这个电路只是拒绝正常运行。这就是我们在故障诊断和硅调试方面所做的工作。我们正在研究快速但准确地确定有缺陷芯片上故障的根本原因的方法，即使许多独立的错误导致一个单一的坏结果。我们开发了分析电路故障方式的算法，然后使用有关电路本身的信息来推断最可能的故障原因。我们考虑了许多类型的电路故障，从逻辑错误到间歇性或时序故障，并针对一系列缺陷机制，从常见的制造错误到复杂和奇异的缺陷场景。我们正在构建与行业标准数据格式和工具流兼容的工具，以便我们的工作能够立即产生行业效益。我们研究的目标是开发复杂而高效的算法，可以处理现代芯片可能出现故障的各种方式。如果半导体行业要实现其(几乎)不可能完成的任务，即以更少的成本和更短的上市时间生产更高质量的产品，那么良好的诊断和调试工具是必要的。