SHF: Small: Data Learning Framework for Diagnosis Based Yield Optimization

摘要：在半导体行业，生产成品率，即生产的可销售产品的百分比，是决定产品线财务成功的关键指标。低产量意味着设计成本的增加、上市时间的延迟和生产率的降低。当出现低成品率时，需要花费大量的工程资源来诊断和解决问题。本项目提出开发一种新的数据学习框架，大大提高诊断和解决过程的效率和有效性。该框架由新开发的软件基础设施组成，该基础设施通过设计和硅测试数据生成，与现有的电子设计自动化（EDA）和硅测试软件基础设施接口。一组数据学习软件工具和方法用于分析所述数据，以自动提取知识以提高产量。该研究与教育活动相结合，开发课程和教程材料，发布给行业，产生广泛的影响，一个最先进的教育实验室，以及一个研究项目，以吸引本科生和代表性不足的学生。该研究努力实现对最先进的设计和制造实践的全面理解，包括未来的预期问题，并完成多学科研究，融合EDA，硅测试，数据挖掘和机器学习的知识。通过这项研究发现的知识将为工业界提供一个明确的方向，即在哪里投资资源，以更好地应对未来超纳米制造技术中与产量相关的问题。该框架旨在有效地提高良率，这有助于提高半导体设计行业的生产率。

ABSTRACTIn the semiconductor industry, manufacturing yield, measured as the percentage of salable products produced, is a key metric that determines the financial success of a product line. Low yield translates into increased design cost, delayed time-to-market, and reduced productivity. When low yield occurs, tremendous engineering resources are spent to diagnose and resolve the problems. This project proposes to develop a novel data learning framework that greatly improves the efficiency and effectiveness of the diagnosis and resolution process. The framework consists of a newly developed software infrastructure that interfaces with the existing Electronic Design Automation (EDA) and silicon test software infrastructures, through the design and silicon test data they produce. A collection of data learning software tools and methodologies that analyze said data are utilized to automatically extract knowledge for yield improvement. The research is integrated with educational activities to develop course and tutorial materials released to the industry for broad impact, a state-of-the-art laboratory for education, and a research program to attract undergraduate and underrepresented students. The research strives to achieve a comprehensive understanding of state-of-the-art design and manufacturing practices including anticipated issues in the future, and to accomplish multidisciplinary studies merging knowledge from EDA, silicon test, data mining, and machine learning. Knowledge discovered through this research will provide the industry with a clear direction on where to invest resources to better cope with yield related issues in future ultra nanometer manufacturing technologies. The framework is designed to efficiently improve yield, which helps improve productivity in the semiconductor design industry.