GOALI: A Truly CMOS Compliant On-Chip Optical Interconnect System for VLSI Chips

这里提出的研究计划的目的是证明一个纯粹的片上，多GHz，光学互连系统实现深亚微米CMOS技术从商业硅代工厂。关键的管理理念是尽可能地将光学互连组件技术严格限制在常规的最先进的集成电路中发现的材料和工艺。为了解决电互连问题，CMOS材料技术已经扩展到包括低k电阻、新冶金和铜封装膜。我们建议使用这些工具来实现光互连。具体地，光学互连将基于由氮化硅和低k值多晶硅构成的波导，该波导已经作为CMOS互连电介质层存在，并且肖特基势垒接触的多晶硅光电二极管由标准CMOS电阻器多晶硅膜制成。使用多晶硅光电探测器而不是晶体光电探测器允许我们将光电探测器从高性能数字VLSI芯片中典型的噪声衬底环境中移到噪声较小且控制更好的后端层。初步工作已在我们的实验室进行MSM光电二极管的基础上非晶硅。MOSFET本身性能的提高将用于实现多GHz接收器。唯一不能在CMOS中实现的组件是高速、高功率光源，其将使用单个边缘发射激光二极管。所有CMOS相关晶圆制造将由我们的工业合作伙伴安捷伦科技公司提供。此外，安捷伦科技在ASIC和光学IC设计方面拥有丰富的专业知识，也将与我们合作评估概念和改进设计。这种独特的关系是确保所提出的技术实用性的关键。因此，所提出的研究的智力价值在于，在现代硅CMOS技术中的材料和工艺步骤的专用嵌入片上光学互连结构的方法。据我们所知，这是首次尝试开发、设计和演示一个完整的集成系统，为硅技术的进一步发展提供有价值的数据。首先，它为技术进步提供了必要的推动力，使之沿着摩尔定律发展，远远超出了ITRS所预测的道路。拟议的研究旨在解决可能成为未来5-10年使能技术之一的解决方案。其次，它为学术和工业合作和参与提供了一个平衡的论坛。这种密切合作确保了潜在技术的实用性。此外，除了常规的出版渠道外，研究成果还可以通过我们的工业合作伙伴更快、更有说服力地传播。最后，落基山脉地区在半导体和光学工程方面拥有高度集中的研发设施。这两个学科之间的交叉授粉是孵化新技术的关键。拟议的研究将使我们能够创建跨学科的课程和研讨会。我们还建议组织第一次完全CMOS兼容的片上光互连国际研讨会，以汇集该领域的研究人员，进一步交流思想和讨论问题。利用我们的研究成果，我们将在其他相关会议上提供教程，如ISCAS和ICCC。此外，我们还将邀请一名高中科学教师参与该项目，在当地一所高中创建“科学博览会”项目。该项目将涉及多达4名高中生参与调试和测量波导材料。学生们将使用该项目的结果参加科罗拉多科学博览会的比赛。

The research program proposed here is designed to demonstrate a purely on-chip, multi-GHz, optical interconnect system implemented in deep submicron CMOS technology from commercial silicon foundries. The critical governing philosophy is to strictly limit the optical interconnect component technology wherever possible to materials and processes found in conventional state- of-the-art integrated circuits. In an effort to address electrical interconnect issues, CMOS materials technology has expanded to include low-k dielectrics, new metallurgy, and copper encapsulation films. We propose to use these very tools to implement optical interconnects. Specifically, the optical interconnect will be based on waveguides composed of silicon nitride and low-k dielectrics already present as CMOS interconnect dielectric layers and Schottky barrier contacted polysilicon photodiodes made from standard CMOS resistor polysilicon films. The use of polysilicon photodetectors rather than crystalline photodetectors allows us to move the photodetectors out of the noisy substrate environment that is typical in high performance digital VLSI chips to less noisy and more well controlled back-end layers. Preliminary work has been performed in our laboratory on MSM photodiodes based on amorphous silicon. The increased performance of the MOSFETs themselves will be leveraged to implement multi-GHz receivers. The only component that cannot be implemented in CMOS is a high speed, high power optical source for which a single edge emitting laser diode will be used. All CMOS related wafer manufacturing will be provided by our industrial partner, Agilent Technologies. In addition, Agilent Technologies, with their extensive expertise in ASIC and optical IC designs, will also collaborate with us to evaluate concepts and improve designs. This unique relationship is a key to ensure the practicality of the proposed technology. Therefore, the intellectual merit of the proposed research lies in the method that makes exclusive use of materials and processing steps in modern silicon CMOS technologies to embed on-chip optical interconnect structures. This is, to our best knowledge, the first attempt to develop, design, and demonstrate a complete integrative system that will provide valuable data for further advances in silicon technology.The impact of the proposed research is threefold. Firstly, it provides necessary impetus for technology advances along the Moore's Law well beyond the path that is projected by ITRS. The proposed research is aimed at solutions that can become one of the enabling technologies for the next 5-10 years. Secondly, it provides a well-balanced forum for academic and industrial collaboration and participation. Such close collaboration ensures practicality of potential technologies. Furthermore, research results can be disseminated faster and more convincingly through our industrial partners in addition to regular publication channels. Lastly, the Rocky Mountain region has a high concentration of R&D facilities in semiconductor and optical engineering. Cross-pollinations between these two disciplines are crucial for incubating new technologies.The proposed research will allow us to create cross-disciplinary curriculum and seminar. We also propose to organize a first international workshop on fully CMOS compliant on-chip optical interconnects to assemble researchers in this field to further exchange ideas and discuss issues. Using our research results, we will offer tutorials at other related conferences, such as ISCAS and ICCC. Furthermore, we will bring a high-school science teacher into the project to create a "Science Fair" project in a local high school. The project will be involved with up to 4 high school students participating in debugging and measurement wave guide materials. The students will compete in Colorado Science Fair competition using the results from the project.