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CAREER: Exploring the Complexity Limits of Joint Data Detection and Channel Estimation: Exact, Polynomial-Complexity Solutions and Ultra-Fast Approximations

CAREER: Exploring the Complexity Limits of Joint Data Detection and Channel Estimation: Exact, Polynomial-Complexity Solutions and Ultra-Fast Approximations
职业:探索联合数据检测和信道估计的复杂性极限:精确、多项式复杂性解决方案和超快速近似
批准号:
0346977
负责人:
Achilleas Anastasopoulos
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-02-15 至 2010-01-31

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中文摘要
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英文摘要
Future communication systems will be required to operate very close totheir theoretical limits and achieve high performance with limitedresources (e.g., bandwidth, energy, complexity). In order to realizethese goals, the receiver of a communication system should be able todecode the digital data in the presence of channel uncertainty (e.g.,unknown channel quality, interference, etc.). The current state ofknowledge regarding the complexity of these receivers is that theircomplexity grows exponentially with the sequence length. This isunacceptable when practical implementation of these algorithms is ofinterest. A number of fundamental questions thus arise: (i) Howaccurate is the conventional wisdom that complexity growsexponentially with the sequence length? (ii) What is the impact ofthe above question on the design of near-optimal, approximatealgorithms suited for ultra-fast integrated circuit implementation?(iii) How can the complexity/performance tradeoff of these approximatealgorithms be analyzed, and how can it be improved?This research addresses the aforementioned fundamental questionsusing a novel approach in looking at the problem of joint datadetection and channel estimation, consisting of two main thrusts: (a)On the theoretical front, the current state of knowledge is challenged,by investigating a broad class of communication scenarios for whichthe exact solution can be obtained with only polynomial complexity.(b) Utilizing the constructive proofs of the aforementioned statements,a family of novel receivers is investigated with near-optimalperformance, linear complexity, and moreover, algorithmic structurethat is suitable for high-speed hardware implementation.
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