NER: Exploring Nanodevices for Probabilistic Computing Architectures

提案编号：0403958机构：布朗大学校长：Zaslavsky，亚历山大标题：NER：探索纳米器件的概率计算架构摘要：现代晶体管为基础的数字技术的进展依赖于缩小硅晶体管的尺寸越来越小，并集成更多的这些晶体管到逻辑电路。 然而，在未来十年的某个时候，晶体管将达到其最终的物理尺寸，电路将包含如此多的晶体管，以至于一些无法工作的器件是不可避免的。 因此，我们可能既需要新型器件来取代硅晶体管，也需要新型逻辑架构来容忍电路中一定数量的缺陷器件，或者两者兼而有之。 我们建议将我们以前开发的概率计算机架构映射到真实的实验设备上，这些设备将由碳纳米管材料制成。 相反，纳米管器件原型的非线性特性将为设计更先进的容错逻辑电路提供实验输入。

PROPOSAL NO: 0403958INSTITUTION: Brown UniversityPRINCIPAL INVESTIGATOR: Zaslavsky , AlexanderTITLE: NER: Exploring Nanodevices for Probabilistic Computing ArchitecturesAbstract:The progress of modern transistor-based digital technology has depended on shrinking silicon transistor to ever smaller sizes and integrating more of these transistors into logic circuits. At some point in the next decade, however, transistors will reach their ultimate physical size and circuits will contain so many transistors that some nonworking devices are inevitable. As a result, we may need both new types of devices to replace silicon transistors or new types of logic architectures that can tolerate some number of defective devices in a circuit, or both.The proposed exploratory research targets both of these issues. We propose to map our previously developed probabilistic computer architectures onto real experimental devices, that will be fabricated from carbon nanotube material. Conversely, the nonlinear characteristics of the nanotube device prototypes will provide the experimental inputs to designing more advanced fault-tolerant logic circuits.