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NIRT: Atom-Scale Silicon Integrated Circuits for Quantum Computation

NIRT: Atom-Scale Silicon Integrated Circuits for Quantum Computation
NIRT:用于量子计算的原子级硅集成电路
批准号:
0404208
负责人:
Tsung-Cheng Shen
金额:
$130.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-08-01 至 2009-07-31

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中文摘要
翻译
提案编号:0404208 PI:Shen,Tsung-Cheng Title:用于量子计算的原子级硅集成电路摘要:随着每个电子器件尺寸的减小和器件密度的增加,能量效率是将摩尔定律扩展到22 nm技术节点之外的挑战之一。解决这个问题的一种方法是采用单电子晶体管(SET)来执行逻辑运算。然而,SET的灵敏度也使它们容易受到附近任何电荷缺陷的影响。因此,很难将SET与传统硅器件的其余部分集成。在这个项目中,我们计划通过在硅晶体内图案化二维磷掺杂剂原子来制造原子级外延SET。由于SET的隧穿间隙是晶体硅,因此可以消除传统金属基SET的电荷和噪声问题。此外,至少在少数情况下,量子计算算法已被证明比经典信息处理快几个数量级。SET对于读出存储在量子比特(qbit)中的信息是必不可少的。该项目的最终研究目标是建立所有必要的组件,磷供体阵列,集成SET读出,大小和频率缩放的门,以展示原型量子信息过程。该项目的教育目标是为研究生和本科生以及博士后提供与顶级科学家合作的机会,并使用来自全国各地的最佳研究工具和专业知识。他们的教育机会将从原子尺度的材料和器件物理到世界级的光刻,门电路和纳米加工。
英文摘要
Proposal No : 0404208PI: Shen, Tsung-ChengTitle: Atom-Scale Silicon Integrated Circuits for Quantum ComputationAbstract: As the dimensions of each electronic device decrease and the density of devices increases, energy efficiency is one of the mounting challenges to extend Moore's law beyond 22 nm technology node. One way to address this issue is to employ single electron transistors (SETs) to perform logic operations. However, the sensitivity of the SETs also makes them susceptible to any charge defect nearby. As a result, it is very difficult to integrate SETs with the rest of the conventional silicon devices. In this project, we plan to fabricate atom-scale epitaxial SETs by patterning two-dimensional phosphorous dopant atoms inside a silicon crystal. Since the tunneling gap of the SET is of crystalline silicon, charge and noise problems plaguing the conventional metal-based SET could be eliminated. In addition, quantum computation algorithms have proven to be orders of magnitude faster than the classical information processing, at least in a few cases. The SETs are essential to read out the information stored in quantum bits (qbit). The ultimate research goal of this project is to establish all the necessary components, phosphorous donor arrays, integrated SET readout, gates scaled in size and frequency, to demonstrate a prototype quantum information process. The educational goal of this project is to provide an opportunity for graduate and undergraduate students and post docs, to work with top scientists and use the best research tools and expertise assembled from across the country. Their educational opportunities will range from atom-scale materials and device physics to world-class lithography, gate dielectrics, and nanoprocessing.
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