课题基金 / 基金详情

Baseband Signal Processing Algorithm and VLSI Architecture Co-Design Methodologies for Wireless MIMO Transceivers

Baseband Signal Processing Algorithm and VLSI Architecture Co-Design Methodologies for Wireless MIMO Transceivers
无线 MIMO 收发器的基带信号处理算法和 VLSI 架构协同设计方法
批准号:
0522457
负责人:
Tong Zhang
金额:
$18.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2005
资助国家:
美国
项目状态:
已结题
起止时间:
2005-09-01 至 2008-08-31

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中文摘要
翻译
该集成系统提案的重点是开发算法和VLSI架构协同设计方法,用于在高数据速率无线多输入多输出(MIMO)收发器中实现基带信号处理构建模块。MIMO最近成为几乎唯一可行的路径,以推出非常高的数据速率无线网络,而无需额外的频谱和传输功率的成本。然而,复杂的基带信号处理使得在真实的世界中实现MIMO所承诺的容量成为一个挑战。该方案的智力价值在于共同考虑算法开发和VLSI架构设计的研究主题,以应对MIMO基带信号处理实现的挑战。应用并行/规则驱动的算法/架构协同设计方法,我们将为无线MIMO收发器中的三个主要基带信号处理模块开发协同设计解决方案,包括近最佳非线性硬/软输出MIMO信号检测器,有限搜索状态并行卷积码硬/软输出解码器和低密度奇偶校验(LDPC)码编码器/解码器。更广泛的影响:本建议的教育目标是促进超大规模集成电路信号处理的教育,连接半导体和信号处理/通信的跨学科领域,以更广泛的学生。这项研究具有广泛的影响,在设计和高数据速率的无线网络,将有非常重要的国民经济和安全,并将无处不在的家庭,学校,城市街道和机场的21世纪世纪的有效性。 它还将有益于许多其他实际应用,例如光通信、铜线网络和磁/全息存储,其中LDPC编码、卷积码解码和/或MIMO信号检测可以是核心信号处理功能。
英文摘要
This integrative systems proposal focuses on the development of algorithm and VLSI architecture co-design methodologies for implementing baseband signal processing building blocks in high data rate wireless multiple-input multiple-output (MIMO) transceivers. MIMO recently emerged as the almost only viable path to launch very high data rate wireless networks at no cost of extra spectrum and transmission power. However, the complex baseband signal processing makes it a challenge to realize the capacity promised by MIMO in the real world. The intellectual merit of this proposal lies in the research theme of jointly considering algorithm development and VLSI architecture design to tackle the MIMO baseband signal processing implementation challenge. Applying a parallelism/regularity-driven algorithm/architecture co-design methodology, we will develop co-design solutions for three major baseband signal processing blocks in wireless MIMO transceivers, including near-optimum non-linear hard/soft-output MIMO signal detector, limited search state-parallel convolutional code hard/soft-output decoder, and low-density parity-check (LDPC) code encoder/decoder. The Broader Impacts: The education objective of this proposal is to promote the education of VLSI signal processing, the inter-disciplinary area linking semiconductor and signal processing/communication, to a wider spectrum of students. This research has broad impact in the design and effectiveness of high data rate wireless networks that will have great importance to national economy and security and will be ubiquitous in homes, schools, city streets, and airports of the 21st century. It will also benefit many other real-life applications such as optical communications, copper-wired networks, and magnetic/holographic storage, where LDPC coding, convolutional code decoding, and/or MIMO signal detection may be core signal processing functions.
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