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Design of Energy-Efficient Programmable Signal Processing Accelerators in 3D Integrated Heterogeneous Multi-Core Processor for Mobile Multimedia Communication

Design of Energy-Efficient Programmable Signal Processing Accelerators in 3D Integrated Heterogeneous Multi-Core Processor for Mobile Multimedia Communication
用于移动多媒体通信的 3D 集成异构多核处理器中节能可编程信号处理加速器的设计
批准号:
0823971
负责人:
Tong Zhang
金额:
$32.81万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2008
资助国家:
美国
项目状态:
已结题
起止时间:
2008-09-01 至 2011-12-31

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中文摘要
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英文摘要
The objective of this research is to develop energy-efficient programmable signal processing accelerators for heterogeneous multi-core mobile multimedia communication processors utilizing three-dimensional (3D) integration technology. The approach is to use the massive storage capacity and extremely high logic-memory data bandwidth enabled by 3D logic-memory integration, realized by vertically stacking high-performance logic die and high-density memory dies together, to fully exploit the parallelism inherent in most signal processing functions.The intellectual merit lies in the research theme of jointly considering signal processing algorithm, programmable accelerator architecture, and memory modeling and optimization to most effectively exploit the unique features, i.e., storage capacity and bandwidth, provided by 3D logic-memory integration. Within the proposed scope, this research addresses video coding and forward error correction coding systems, which dominate the energy consumption of mobile multimedia communication signal processing. Because of the high storage density of dynamic random access memory (DRAM), this research will focus on 3D logic-DRAM integration and develop accurate 3D DRAM modeling and performance prediction capability in a truly technology-aware manner.The broader impacts of the research include the potential to greatly improve the energy efficiency of future mobile multimedia communication devices by providing energy-efficient programmable signal processing accelerator design solutions. In addition, the research represents a first step towards establishing a new area of 3D very large-scale integration (VLSI) signal processing that naturally expands the traditional VLSI signal processing area. The project also promotes the education of a wide spectrum of students in advances in future nanoscale integrated circuits and 3D integration.
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Collaborative Research: SHF: Medium: Hardware and Software Support for Memory-Centric Computing Systems
  • 批准号:
    2312508
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $33.4万
  • 财政年份:
    2023
  • 负责人:
    Tong Zhang
  • 依托单位:
Collaborative Research: SHF: Medium: A New Direction of Research and Development to Fulfill the Promise of Computational Storage
  • 批准号:
    2210754
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $40.0万
  • 财政年份:
    2022
  • 负责人:
    Tong Zhang
  • 依托单位:
CNS Core:Small: Re-thinking the Design of Data Management Software Upon the Arrival of SSDs with Built-in Transparent Compression
  • 批准号:
    2006617
  • 项目类别:
    Standard Grant
  • 资助金额:
    $38.94万
  • 财政年份:
    2020
  • 负责人:
    Tong Zhang
  • 依托单位:
CSR: Small: Software-defied HDDs: A System-centric Design Framework to Minimize Data Storage Cost for Data Centers
  • 批准号:
    1814890
  • 项目类别:
    Standard Grant
  • 资助金额:
    $31.39万
  • 财政年份:
    2018
  • 负责人:
    Tong Zhang
  • 依托单位:
国内基金
海外基金
度量测度空间上基于狄氏型和p-energy型的热核理论研究
  • 批准号:
    QN25A010015
  • 项目类别:
    省市级项目
  • 资助金额:
    --
  • 批准年份:
    2025
  • 负责人:
    高晋
  • 依托单位: