Background Calibration Technique for High-Resolution Analog to Digital Converters in Submicron CMOS

亚微米 CMOS 高分辨率模数转换器的背景校准技术

• 批准号: 0523996
• 负责人: John McNeill
• 金额: --
• 依托单位: Worcester Polytechnic Institute
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2005
• 资助国家: 美国
• 起止时间: 2005-09-01 至 2008-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0523996&HistoricalAwards=false
• 关键词: Background; Calibration; Technique; Resolution; Analog

McNeill 0523996This integrative systems proposal focuses on development of a new class of self-calibrating analog-to-digital converters (ADCs). The new "Split ADC" architecture enables integration of high resolution; self-calibrating ADCs at low cost with advanced digital CMOS integrated circuits (ICs). This capability fills a critical need in a wide range of emerging mixed signal application areas, including integrated sensors for biomedical and homeland security applications. In terms of intellectual merit, the new "Split ADC" architecture represents a genuine creative design breakthrough in response to the specific constraints of advanced digital CMOS processing technology. The PIs previous work in developing the "split ADC" architecture has been proven by successful fabrication and test of a 16bit, 1MSample/s, cyclic ADC. This is an indication of both the validity of the concept to be extended and the PI's ability to successfully complete the proposed work.Broader impacts: The successful completion of the work described in this proposal will extend development of this new class of self-calibrating ADCs to the important application area of interleaved ADCs. The project will also contribute to the goal of expanding education by supporting a Ph.D. student to perform the bulk of the research work. Results of this research will be used as a module in a graduate-level circuit design course. Additionally, the PI will involve undergraduate students in this research effort.

麦克尼尔0523996该集成系统提案的重点是开发一种新型自校准模数转换器（ADC）。新的“分离式ADC”架构可实现高分辨率、低成本自校准ADC与先进数字CMOS集成电路（IC）的集成。这种能力满足了广泛的新兴混合信号应用领域的关键需求，包括用于生物医学和国土安全应用的集成传感器。在智能化方面，新的“分离式ADC”架构代表了针对先进数字CMOS处理技术特定限制的真正创造性设计突破。 PI先前在开发“分离式ADC”架构方面的工作已通过成功制造和测试16位、1 MSample/s循环ADC得到证明。更广泛的影响：本提案中所述工作的成功完成，将把这类新型自校准ADC的开发扩展到交错式ADC的重要应用领域。 该项目还将通过支持一名博士生，促进扩大教育的目标。让学生完成大部分的研究工作。 本研究的成果将作为一个模块，在研究生水平的电路设计课程。此外，PI将让本科生参与这项研究工作。