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DEVELOPMENT OF COMPLIANT FREE-STANDING STRUCTURES FOR SUB 32-nm MULTI-CORE ICs

DEVELOPMENT OF COMPLIANT FREE-STANDING STRUCTURES FOR SUB 32-nm MULTI-CORE ICs
为低于 32 nm 的多核 IC 开发合规的独立式结构
批准号:
0901679
负责人:
Suresh Sitaraman
金额:
$35.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-15 至 2012-08-31

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中文摘要
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英文摘要
The objective of this research is to design, fabricate, assemble, characterize, and test innovative compliant, free-standing, parallel-path, off-chip interconnects for next-generation microelectronic systems. The proposed interconnects will be wafer-level, scalable, cost-effective, environmentally-friendly, and reworkable. The approach is to employ a heterogeneous architecture that combines both column and parallel-path compliant interconnects that will be fabricated through sequential lithography and plating processes. By developing electrical and thermo-mechanical simulation models, the interconnect design will be optimized. The proposed compliant interconnects represent a paradigm shift in chip-to-substrate interconnect technology and present an innovative approach to meet the semiconductor packaging requirements for the year 2016 and beyond. Combining the fundamental principles related to material, mechanical, electrical, and thermal characteristics with practical aspects of fabrication, assembly, and testing of interconnects, this high-risk far-reaching approach proposed in this program is beyond the current focus of the electronics industry, and thus lends itself to university-based research. Through miniaturization, this program will have a unique impact in areas such as high-speed computing, medical electronics and sensors implanted in the body for health monitoring and drug delivery, integrated digital-RF-opto systems, wireless and portable electronics, and smart "fly" electronics and sensors used for intelligence gathering and bio/chemical sensing. Thus, by impacting computer, communications, consumer, and medical microsystems, this research will provide extensive benefits to the society at large. The research findings will be integrated into classroom instruction and published in journals and conferences. Through student internships and one-to-one mentoring, a diverse mix of students will be motivated to pursue engineering education.
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Non-Contact Experimental Technique to Characterize Interfacial Crack Propagation in Nano-Scale and Micro-Scale Thin Films
  • 批准号:
    0800037
  • 项目类别:
    Standard Grant
  • 资助金额:
    $25.0万
  • 财政年份:
    2008
  • 负责人:
    Suresh Sitaraman
  • 依托单位:
Fixtureless Stress-Engineered Test Methods for the Measurement of Interfacial Fracture Toughness for Micro- and Nano-scale Thin-film Interfaces
  • 批准号:
    0510211
  • 项目类别:
    Standard Grant
  • 资助金额:
    $19.0万
  • 财政年份:
    2005
  • 负责人:
    Suresh Sitaraman
  • 依托单位:
SGER: Innovative Off-Chip Interconnects for 45-nm and sub-45-nm Node ICs
  • 批准号:
    0539023
  • 项目类别:
    Standard Grant
  • 资助金额:
    $0.0万
  • 财政年份:
    2005
  • 负责人:
    Suresh Sitaraman
  • 依托单位:
CAREER: Implantable Medical Devices: A Process-Modeling Approach to High Reliability Miniaturization
  • 批准号:
    9702285
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $28.5万
  • 财政年份:
    1997
  • 负责人:
    Suresh Sitaraman
  • 依托单位:
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