CSR---AES: Collaborative Research: Novel Programming Models and Architectures to Simplify Parallel Programming

CSR---AES：协作研究：简化并行编程的新颖编程模型和架构

• 批准号: 0720593
• 负责人: Josep Torrellas
• 金额: $ 88.99万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-10-01 至 2011-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0720593&HistoricalAwards=false
• 关键词: CSR; AES; Collaborative; Research; Novel

The focus of this project is on the programming of multi-core chips. The goal of the project is to find a comprehensive parallel programming environment that can substantially simplify parallel programming for multi-cores.Current parallel programming approaches are typically too complicated for most programmers or do not deliver adequate performance. A major breakthrough is needed to simplify parallel programming to effectively utilize multi-core hardware. Reducing the complexity of parallel programming and enabling its widespread use has emerged as a Grand Research Challenge for the systems community. It is fundamental to the computer industry''s ability to continue innovating. The scope of this project is to study two novel parallel programming models that either separately or in combination have the potential to provide dramatic improvements in programmer productivity. The two novel parallel programming models that may have the potential to simplify parallel programming and be accepted by large numbers of programmers are Colorama and IPOT.Colorama is an architecture-supported Data Centric Synchronization (DCS) approach, and is used in explicitly parallel programs. In DCS, the programmer specifies concurrency control by associating synchronization constraints with the program data structures, typically when they are declared or allocated. These constraints determine which sets of data structures are in the same data consistency domain and, therefore, should be kept consistent with each other. At run time, when one data structure is being modified by a thread, the system automatically protects all the other data structures in the same domain from access by other threads. Compared to programming with locks and transactions, where the programmer reasons non-locally, Colorama has a significant programmability advantage: the programmer reasons locally, focusing only on what data structures should be consistent with each other; the system will automatically infer the critical sections.Implicit Parallelism with Ordered Transactions (IPOT) supports speculative threads in a sequential thread of execution. The key idea is that the programmer is allowed to specify opportunities for parallelization within the sequential thread using a set of simple yet very powerful annotations. Unlike explicit parallelism, IPOT annotations do not require the programmer or the compiler to prove the absence of data or control dependences. There is runtime architectural support to detect violations, and squash and restart threads. Unlike conventional TLS, the system can extract much more parallelism because it leverages user information. It is possible to use these models separately or, since they are complementary, in combination for example, by using Colorama on explicitly-parallel code where each thread is implicitly parallelized with IPOT. Both models require special hardware support in the multi-core chip.The project teams activities address several layers of multi-core programming/architectural frameworks:1. Programming Models -- The project team will study the design issues in the specification of the Colorama, IPOT, and Unified programming models (Unified is the combination of Colorama and IPOT).2. Compilation -- The team will develop compiler technology to improve the performance and guarantee the correctness of their programming models.3. Runtime System -- Libraries and a runtime system will be developed for these models.4. Computer Architecture -- Different levels of architectural support for these models will be explored.5. Performance Monitoring and Debugging Tools -- A set of tools will be developed that allow programmers to debug, test, and tune programs written for the programming models.6. Applications -- A suite of applications will be developed that use the programming models.7. Empirical Productivity Studies -- A set of empirical programmer productivity experiments will be carried out in a course at the University of Illinois.This work involves a collaboration between the University of Illinois and IBM Research, leveraging a large amount of existing IBM-sponsored infrastructure to release the complete software infrastructure of the programming environment that is developed by the project team.

本课题的重点是多核芯片的编程。该项目的目标是找到一个全面的并行编程环境，可以大大简化多核并行编程。对于大多数程序员来说，当前的并行编程方法通常过于复杂，或者无法提供足够的性能。简化并行编程以有效利用多核硬件需要一个重大突破。降低并行编程的复杂性并使其广泛使用已成为系统社区面临的重大研究挑战。它是计算机行业持续创新能力的基础。这个项目的范围是研究两种新的并行编程模型，这两种模型可以单独使用，也可以结合使用，都有可能极大地提高程序员的工作效率。有两个新的并行编程模型可能有潜力简化并行编程并被大量程序员接受，它们是Colorama和IPOT。Colorama是一种架构支持的数据中心同步（DCS）方法，用于显式并行程序。在DCS中，程序员通过将同步约束与程序数据结构相关联（通常是在声明或分配同步约束时）来指定并发控制。这些约束决定了哪些数据结构集位于相同的数据一致性域中，因此应该保持它们之间的一致性。在运行时，当一个线程修改一个数据结构时，系统会自动保护同一域中的所有其他数据结构不被其他线程访问。与锁和事务编程相比，程序员在非本地进行推理，Colorama具有显著的可编程性优势：程序员在本地进行推理，只关注哪些数据结构应该彼此一致；系统会自动推断出临界区域。有序事务的隐式并行（IPOT）支持顺序执行线程中的推测线程。关键思想是允许程序员使用一组简单但功能强大的注释来指定顺序线程内并行化的机会。与显式并行不同，IPOT注释不需要程序员或编译器证明不存在数据或控制依赖。运行时体系结构支持检测违规、压缩和重启线程。与传统的TLS不同，该系统可以提取更多的并行性，因为它利用了用户信息。可以单独使用这些模型，或者因为它们是互补的，可以组合使用，例如，通过在显式并行代码上使用Colorama，其中每个线程都与IPOT隐式并行。这两种型号都需要多核芯片的特殊硬件支持。项目团队的活动涉及多核编程/体系结构框架的几个层次：编程模型——项目团队将研究Colorama、IPOT和Unified编程模型（Unified是Colorama和IPOT的结合）规范中的设计问题。编译——该团队将开发编译器技术，以提高性能并保证其编程模型的正确性。运行时系统——将为这些模型开发库和运行时系统。计算机体系结构——将探讨对这些模型的不同层次的体系结构支持。性能监控和调试工具——将开发一套工具，使程序员能够调试、测试和调优为编程模型编写的程序。应用程序——将使用编程模型开发一套应用程序。实证生产力研究——伊利诺斯大学的一门课程将进行一系列实证程序员生产力实验。这项工作涉及伊利诺伊大学和IBM研究院之间的合作，利用大量现有的IBM赞助的基础设施来发布由项目团队开发的编程环境的完整软件基础设施。