ACED Fab: Co-Design of Novel Electronic-Photonic Systems for Energy-Efficient Coherent Optical Interconnects
ACED Fab: Co-Design of Novel Electronic-Photonic Systems for Energy-Efficient Coherent Optical Interconnects
批准号:
2314868
负责人:
Samuel Palermo
金额:
$40.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-07-01 至 2026-06-30
中文摘要
数据中心和高性能计算系统的互联带宽密度和能效的大幅提高对于支持机器学习、人工智能、传感器系统和5G/6G工作负载的进步是必要的。然而,由于极端的波特率,即每秒信号的变化,在传统的强度调制直接检测(IMDD)光链路中缩放数据速率存在基本限制。相干光互连提供了一种潜在的解决方案,因为它们同时调制光载波的幅度和相位,并利用双偏振(DP)操作来允许每个波长的带宽密度显著增加。虽然相干光纤链路具有频谱效率,但主要挑战包括有限的硅光子调制器带宽、由于光子器件和前端电路的独立设计而导致的高功率收发器、对光子器件制造变化的敏感性,以及通常在复杂的数字信号处理器(DSP)模块中执行的高功率接收器侧光载波恢复。该方案通过共同设计能够适应光学器件性能变化的高带宽光子器件和高级节点CMOS前端,以及利用基于双环光学锁相环(OPLL)的高能效接收侧载波恢复方案来解决这些重要问题。拟议的技术将实现高能效的相干光纤收发器,允许数据中心流量容量的大幅扩展,以支持由新兴应用(例如联网汽车)驱动的网络设备的前所未有的增长。该方案的研究目标是开发一种基于薄膜LiNbO_3(Tf-LN)Mach-Zehnder调制器(MZM)的新型高带宽正交调制器和具有石墨烯光电探测器的正交解调器的相干光互连结构。为了实现这一目标,将共同设计具有动态电压频率调节(DVFS)的节能CMOS发射器和具有DVFS、自适应带宽前端和自动调谐正交解调器的节能CMOS接收器。此外,还将开发一种基于光学锁相环(OPLL)的宽范围电子压控振荡器(VCO)调谐载波恢复方案。应用建议的技术将彻底改变数据中心和高性能计算系统的未来,因为它能够提供无差错编码的低延迟互连。该项目将涉及一个由2名德克萨斯农工大学(TAMU)学生和3-4名国立中兴大学(NCHU)学生组成的跨学科团队。两套原型将使用两种先进的CMOS工艺实现,一种是硅光子工艺,另一种是定制的薄膜TF-LN集成电路。项目外展活动包括交流和访问活动,在这些活动中,TAMU和NCHU的学生在关键的IC设计阶段面对面地合作,还参加联合研讨会,通过丰富工程经验(E3)计划与高中教师互动,以及通过Spark向PK-12学生介绍基本研究概念!程序。项目成果将通过以下方式广泛传播:纳入名为《相干光学系统》的新研究生课程的教学大纲和网站,为学术界和工业界开发在线模块,以及在国家和国际期刊和会议上发表。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Dramatic improvements in datacenters and high-performance computing systems’ interconnect bandwidth-density and energy-efficiency are necessary to support advances in machine learning, artificial intelligence, sensor systems, and 5G/6G workloads. However, there are fundamental limitations to scaling data rates in conventional intensity-modulated direct detection (IMDD) optical links due to the extreme baud rates, i.e. changes in signals per second. Coherent optical interconnects offer a potential solution, as they modulate both the amplitude and phase of the optical carrier and utilize dual polarization (DP) operation to allow for a dramatic increase in bandwidth-density per wavelength. While coherent optical links are spectrally-efficient, key challenges include limited silicon photonic modulator bandwidth, high-power transceivers due to independent design of the photonic devices and front-end circuitry, sensitivity to photonic device fabrication variations, and high-power receiver-side optical carrier recovery that is commonly performed in a complex digital signal processor (DSP) block. This proposal addresses these important issues by co-designing high-bandwidth photonic devices and advanced-node CMOS front-ends that can adapt to variations in optical device performance and by utilizing a power-efficient receive-side carrier recovery scheme based on a dual-loop optical phased-locked loop (OPLL). The proposed technology will enable energy efficient coherent optical transceivers that will allow dramatic scaling in datacenter traffic capacity to support the unprecedented growth in networked devices driven by emerging applications such as connected automobiles, for example. This proposal’s research goal is to develop a coherent optical interconnect architecture with novel high-bandwidth quadrature modulators with thin-film LiNbO3 (TF-LN) Mach-Zehnder modulators (MZMs) and quadrature demodulators with graphene photodetectors. Co-design of energy-efficient CMOS transmitters with dynamic voltage frequency scaling (DVFS) with efficient switching regulators and energy-efficient CMOS receivers with DVFS, adaptive bandwidth front-ends, and auto-tuned quadrature demodulators will be fabricated to accomplish this goal. In addition, an optical phase-locked loop (OPLL) based carrier recovery scheme with wide-range electronic voltage-controlled oscillator (VCO) tuning will be developed. Applying the proposed technology will revolutionize the future of both datacenter and high-performance computing systems due to its ability to offer low-latency interconnects without error coding. This project will involve an interdisciplinary team of 2 Texas A&M University (TAMU) students and 3-4 National Chung Hsing University (NCHU) students. Two sets of prototypes will be implemented using two advanced CMOS processes, a silicon photonic process, and custom-fabricated thin-film TF-LN integrated circuits. Project outreach activities include exchange and visiting activities where TAMU and NCHU students work together face-to-face on-site during critical IC design phases and also participate in joint workshops, interactions with high school teachers via the Enrichment Experiences in Engineering (E3) program and introducing basic research concepts to PK-12 students through the Spark! Program. Project results will be broadly disseminated by inclusion in the syllabus and website of a new graduate course entitled "Coherent Optical Systems", the development of online modules for academia and industry, and through publication in national and international journals and conferences.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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会议论文
EARS: A Wideband Frequency-Agile Silicon Photonic mm-Wave Receiver with Automatic Jammer Suppression via Rapidly Reconfigurable Optical Notch Filters
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批准号:1547432
-
项目类别:Standard Grant
-
资助金额:$62.5万
-
财政年份:2015
-
负责人:Samuel Palermo
-
依托单位:
CAREER: Process, Voltage, and Temperature (PVT)-Tolerant CMOS Photonic Interconnect Transceiver Architectures
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批准号:1254830
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项目类别:Standard Grant
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资助金额:$40.0万
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财政年份:2013
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负责人:Samuel Palermo
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依托单位:
Advanced Modeling and Design of High-Performance ADC-Based Serial Links
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批准号:1202508
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项目类别:Standard Grant
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资助金额:$36.0万
-
财政年份:2012
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负责人:Samuel Palermo
-
依托单位:
国内基金
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