Collaborative Research: An Efficient Programming Model for HPC Applications on Next-Generation High-end Parallel Machines

协作研究：下一代高端并行机上 HPC 应用的高效编程模型

• 批准号: 0833152
• 负责人: Yuesheng Xu
• 金额: $ 7万
• 依托单位: Syracuse University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-15 至 2010-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0833152&HistoricalAwards=false
• 关键词: Collaborative; Research; Efficient; Programming; Model

Next-generation high-end machines will include interconnected computer nodes, each having heterogeneous accelerators and multi-core CPUs with complex memory hierarchy. They demand a programming model with a unified abstraction for programming dramatically different on-chip and off-chip parallel processing capabilities. None of the existing models is suitable for this need. The most fundamental challenge here is natural expression of parallelism in applications and efficient mapping of such parallelism to the hardware, including data distribution, locality, communication, synchronization, and load balancing. This collaborative research between Syracuse University and Sandia Labs aims at developing an efficient programming model for high performance computing (HPC) applications using multi-core and heterogeneous processors. The specific goal of this study is to develop a high-level parallel programming abstraction with new high-level language constrctions, data types, and runtime library. Hardware features such as cores, memory hierarchy, processor heterogeneity, and interconnection will be embedded in the semantics of the language constructs and data types. The programming abstraction will guide the design and expression of parallel algorithms in the high-level language, mapped automatically onto the hardware for efficient execution. Users will be free from the low-level hardware details. The approaches include: memory virtualization,communication virtualization and processors virtualization.

下一代高端机器将包括互连的计算机节点，每个节点都具有不同的加速器和具有复杂内存层次结构的多核CPU。它们需要一种具有统一抽象的编程模型，用于编程截然不同的片上和片外并行处理能力。现有的模型都不能满足这一需求。这里最基本的挑战是在应用程序中自然地表达并行性，并将这种并行性有效地映射到硬件，包括数据分发、局部性、通信、同步和负载平衡。锡拉丘兹大学和桑迪亚实验室的这项合作研究旨在为使用多核和异类处理器的高性能计算(HPC)应用开发一种高效的编程模型。这项研究的具体目标是开发一个具有新的高级语言结构、数据类型和运行库的高级并行编程抽象。核心、内存层次、处理器异构性和互连等硬件特性将嵌入到语言构造和数据类型的语义中。编程抽象将指导用高级语言设计和表达并行算法，并自动映射到硬件上以实现高效执行。用户将从底层硬件细节中解脱出来。这些方法包括：内存虚拟化、通信虚拟化和处理器虚拟化。