CAREER: Reliable On-Chip Wireless Communication Network for Multi-Core Systems

多核处理平台的应用范围越来越广泛。从消费多媒体到图像处理再到国防应用，包含大量嵌入式内核的新设计正在出现。片上网络（NoC）已经成为一种将大量嵌入式内核集成到单个芯片中的技术。尽管传统NoC具有所有优点，但其基于平面金属互连的多跳通信存在严重的性能限制，其中两个遥远块之间的数据传输会产生高延迟和能量消耗。如果将NoC中的全部或部分有线链路替换为高带宽单跳无线信道，则可以同时解决这些问题。此外，无线链路将缓解noc的有线拥塞问题。最近的研究发现，碳纳米管（CNTs）具有优异的发射和吸收特性，导致其具有类似天线的行为。这为详细研究使用碳纳米管天线构建无线NoC （WiNoC）的可能性提供了新的机会，并随后使WiNoC对纳米器件固有的性能不确定性具有鲁棒性。职业建议？总体研究目标将通过追求两个具体目标来实现：1)建立设计权衡并评估WiNoC架构的性能；所提出的WiNoC具有优于相应有线架构的能力；2)应用错误控制代码，使WiNoC对可能出现的故障具有鲁棒性；通过结合有效的信道编码方案，WiNoC将对各种类型的故障具有鲁棒性。这里提出的研究具有重要意义，因为它从一个全新的角度解决了片上互连问题，即通过开发纳米级的无线网络，而不是追求相对传统的有线互连方法的增量改进。通过将无线电通信世界带入片上环境，所提出的研究有能力改变多核芯片的设计。该提案的教育目标是招募和留住本科生、高中生和来自工程项目中代表性不足群体的学生。接触研究将伴随着积极的促进活动，包括广泛的工程介绍和个性化援助，以增加目标学生的学术准备。这些教育活动的目的，是要增加研究和受教育的机会，以帮助那些在民意调查中未获充分代表的学生。年代的部门。这些学生的进步有望产生广泛的社会影响。该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。

Multi-core processing platforms have an increasingly broad range of applications. From consumer multimedia to image processing to defense applications, new designs containing large numbers of embedded cores are emerging. Network-on-Chip (NoC) has emerged as an enabling technology to integrate large numbers of embedded cores in a single die. In spite of all its advantages, a serious performance limitation in a traditional NoC arises from its planar metal interconnect-based multi-hop communication, wherein the data transfer between two distant blocks gives rise to high latency and energy dissipation. These problems can be simultaneously resolved if all or some of the wired links in a NoC are replaced by high-bandwidth single-hop wireless channels. Moreover, wireless links will alleviate the problem of wire congestion in NoCs.Recent research has uncovered excellent emission and absorption characteristics leading to antenna-like behavior in carbon nanotubes (CNTs). This opens up new opportunities for detailed investigations regarding the possibility of building a wireless NoC (WiNoC) with CNT antennas and subsequently making the WiNoC robust against performance uncertainties inherent in nanodevices. The CAREER proposal?s overall research objective will be attained by pursuing two specific goals: 1) Establish design trade-offs and evaluate performance of WiNoC architectures; the proposed WiNoC has the capability to outperform corresponding wireline architectures; 2) Apply error control codes to make the WiNoC robust against possible malfunctions; by incorporating efficient channel coding schemes, the WiNoC will be made robust against varied types of malfunctions. The research proposed here is significant, as it addresses the on-chip interconnect problem from a fundamentally new perspective, namely by developing a wireless network at the nanoscale, as opposed to pursuing incremental improvements of relatively traditional methods of wire-line interconnection. By bringing the world of radio communication to the on-chip environment, the proposed research has the capability to transform the design of multi-core chips. The educational objective of the proposal is to recruit and retain undergraduates, high school students and students from the underrepresented groups in the engineering program. Exposure to research will be accompanied by proactive enabling activities, including broad spectrum introduction to engineering and individualized assistance to increase academic preparedness of the targeted students. The educational activities are expected to enhance research and educational opportunities for underrepresented students in the PI?s department. Advancement of such students is expected to have broad societal impact.This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5).