CAREER: A Unified Framework for the VLSI Design of Algebraic Soft-decision Reed-Solomon Decoder

职业生涯：代数软决策 Reed-Solomon 解码器 VLSI 设计的统一框架

• 批准号: 0846331
• 负责人: Xinmiao Zhang
• 金额: $ 40万
• 依托单位: Case Western Reserve University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-02-15 至 2014-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0846331&HistoricalAwards=false
• 关键词: CAREER; Unified; Framework; VLSI; Design

The objective of this research is to first design efficient very large-scale integrated (VLSI) system architectures for algebraic soft-decision Reed-Solomon decoders. Then, through studying how the architectures change with design parameters, further optimizations will be carried out to develop a unified framework for the VLSI design of algebraic soft-decision Reed-Solomon decoders. The approach is to optimize the decoding algorithms and VLSI architectures interactively, such that the most efficient decoder architecture can be designed for given application requirements.With respect to intellectual merit, the proposed research serves as a bridge connecting advanced theory and practice. The key potential for innovation in this research is the delicate interplay among algorithmic transformations and novel VLSI design techniques. Unlike traditional design approaches in which the VLSI architectures are determined by the algorithms, interactive algorithmic and architectural optimizations will be employed. Particularly, the feedback from the VLSI design level to the algorithmic level are critical to achieving the most efficient designs and developing an optimized framework. Addressing the challenging tasks in this project requires combined expertise in coding theory, digital communications and VLSI design.With respect to broader impacts, the proposed research could potentially revolutionize digital communication and storage systems. The design techniques to be developed can be also extrapolated to the implementation of other advanced algorithms. The proposed research will be integrated into education through developing dynamic course work, involving both undergraduate and graduate students in research, and promoting engineering to middle and high school students. In addition, the participation of students from underrepresented groups in engineering will be increased by recruiting and retaining women.

本研究的目标是首先为代数软决策 Reed-Solomon 解码器设计高效的超大规模集成 (VLSI) 系统架构。 然后，通过研究架构如何随设计参数变化，进一步优化，开发代数软决策Reed-Solomon解码器VLSI设计的统一框架。 该方法是交互地优化解码算法和VLSI架构，从而可以针对给定的应用需求设计最有效的解码器架构。就智力价值而言，所提出的研究充当了连接先进理论和实践的桥梁。 这项研究的关键创新潜力是算法转换和新颖的 VLSI 设计技术之间微妙的相互作用。 与由算法确定 VLSI 架构的传统设计方法不同，将采用交互式算法和架构优化。 特别是，从 VLSI 设计级别到算法级别的反馈对于实现最高效的设计和开发优化框架至关重要。解决该项目中的挑战性任务需要结合编码理论、数字通信和 VLSI 设计方面的专业知识。就更广泛的影响而言，拟议的研究可能会彻底改变数字通信和存储系统。 待开发的设计技术也可以推广到其他高级算法的实现。 拟议的研究将通过开发动态课程工作融入教育，让本科生和研究生参与研究，并向中学生和高中生推广工程学。 此外，通过招募和留住女性，将增加来自代表性不足群体的学生对工程学的参与。