CRI: IAD Acquisition of High-Performance Multi-Field Programmable Gate Array Platform

CRI:IAD收购高性能多现场可编程门阵列平台

基本信息

  • 批准号:
    0708685
  • 负责人:
  • 金额:
    $ 4.98万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2007
  • 资助国家:
    美国
  • 起止时间:
    2007-09-01 至 2009-08-31
  • 项目状态:
    已结题

项目摘要

CRI: IAD: Acquisition of High-Performance Multi-FPGA PlatformXinmiao ZhangError-correcting coding and cryptography play important roles in the reliability and security of digital communication and storage systems, and digital signal processing can extract useful signals from noisy backgrounds. Our research in the area of VLSI architecture design for these systems serves as a bridge connecting theoretical advancements to their efficient hardware implementations. Currently, our research capability is seriously limited by slow software simulations and the lack of platforms for prototyping and emulation of our designs. In this project, we proposed to acquire a CHIPit Iridium Edition V4 Field Programmable Gate Array (FPGA) platform. This platform offers great flexibility and handles design capacities of up to 4 million Application Specific Integrated Circuits (ASIC) gates. The great flexibility and large capacity of this platform facilitates simulating communication systems in a reasonable time and prototyping complicated systems in real hardware. The reconfigurable FPGA platform combines the simplicity of software design with high-speed and large-capacity performance. This feature allows us to overcome the limitations on simulating and evaluating the increasingly complicated communication and cryptography systems, as well as verify our designs in real time implementations. Specifically, the Iridium FPGA platform will aid our research in the following ways. First it will significantly increase our simulation capability for error-correcting codes. Secondly, it will allow us to prototype large scale systems, such as soft-decision Reed-Solomon decoders, parallel long BCH encoders, cryptographic applications and electrocardiogram (ECG) signal extraction. Thirdly, it will help us to find the hardware implementation bottlenecks in the design, which are otherwise invisible from simulations. Strong educational components are also integrated in this plan. The research results enabled by the proposed acquisition will contribute to the development of a new course. In addition, this project will provide students with hands-on experience on hardware implementation, as well as increase the participation of underrepresented groups in engineering.
纠错编码和密码学对数字通信和存储系统的可靠性和安全性起着重要的作用,数字信号处理可以从噪声背景中提取有用的信号。我们在这些系统的VLSI架构设计领域的研究是连接理论进步和有效硬件实现的桥梁。目前,我们的研究能力受到缓慢的软件模拟和缺乏原型设计和仿真平台的严重限制。在本项目中,我们提出收购CHIPit铱版V4现场可编程门阵列(FPGA)平台。该平台提供了极大的灵活性,可处理多达400万个专用集成电路(ASIC)门的设计能力。该平台具有很大的灵活性和大容量,可以在合理的时间内对通信系统进行仿真,并在实际硬件中对复杂系统进行原型设计。可重构FPGA平台将软件设计的简单性与高速大容量性能相结合。此功能使我们能够克服模拟和评估日益复杂的通信和加密系统的限制,并在实时实现中验证我们的设计。具体来说,铱星FPGA平台将在以下方面帮助我们的研究。首先,它将显著提高我们对纠错码的模拟能力。其次,它将允许我们对大型系统进行原型设计,例如软判决Reed-Solomon解码器,并行长BCH编码器,密码应用和心电图(ECG)信号提取。第三,它将帮助我们找到设计中的硬件实现瓶颈,否则从模拟中是看不见的。强大的教育成分也融入了这个计划。此次收购所带来的研究成果将有助于新课程的开发。此外,该项目将为学生提供硬件实施的实践经验,并增加工程中代表性不足的群体的参与。

项目成果

期刊论文数量(0)
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Xinmiao Zhang其他文献

Perfect Column-Layered Two-Bit Message-Passing LDPC Decoder and Architectures
完美的列分层两位消息传递 LDPC 解码器和架构
Efficient Architectures for Generalized Integrated Interleaved Decoder
通用集成交错解码器的高效架构
Fuzzy synthetic condition assessment of wind turbine based on combination weighting and cloud model
基于组合赋权和云模型的风电机组模糊综合状态评估
  • DOI:
    10.3233/jifs-169220
  • 发表时间:
    2017
  • 期刊:
  • 影响因子:
    2
  • 作者:
    Shuli Guo;Zhenyu Wang;Xinmiao Zhang;Xinghui Dong
  • 通讯作者:
    Xinghui Dong
A Flexible and Low-Complexity Local Erasure Recovery Scheme
一种灵活且低复杂度的本地擦除恢复方案
  • DOI:
    10.1109/lcomm.2016.2604307
  • 发表时间:
    2016
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Xinmiao Zhang;S. Sprouse;I. Ilani
  • 通讯作者:
    I. Ilani
Statin Use during Hospitalization and Short-Term Mortality in Acute Ischaemic Stroke with Chronic Kidney Disease
急性缺血性中风合并慢性肾病住院期间他汀类药物的使用和短期死亡率
  • DOI:
  • 发表时间:
    2018
  • 期刊:
  • 影响因子:
    2.4
  • 作者:
    Xinmiao Zhang;J. Jing;Xingquan Zhao;Liping Liu;Chunxue Wang;Yuesong Pan;X. Meng;Yilong Wang;Yongjun Wang
  • 通讯作者:
    Yongjun Wang

Xinmiao Zhang的其他文献

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{{ truncateString('Xinmiao Zhang', 18)}}的其他基金

Collaborative Research: Secure and Efficient Post-quantum Cryptography: from Coding Theory to Hardware Architecture
合作研究:安全高效的后量子密码学:从编码理论到硬件架构
  • 批准号:
    2052641
  • 财政年份:
    2021
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant
CCSS: Error-Correcting Codes Enabling Hyper-Speed Communications and Storage: from Theory to Hardware Architectures
CCSS:纠错代码实现超高速通信和存储:从理论到硬件架构
  • 批准号:
    2011785
  • 财政年份:
    2020
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant
CAREER: A Unified Framework for the VLSI Design of Algebraic Soft-decision Reed-Solomon Decoder
职业生涯:代数软决策 Reed-Solomon 解码器 VLSI 设计的统一框架
  • 批准号:
    0846331
  • 财政年份:
    2009
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant
Collaborative Research: A Universal Cooperative Communication System-On-Chip
协作研究:通用协作通信片上系统
  • 批准号:
    0836910
  • 财政年份:
    2008
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant
GOALI : Collaborative Proposal: Advanced Coding and Signal Processing for Magnetic Recording: From Theory to Implementation
目标:协作提案:磁记录的高级编码和信号处理:从理论到实现
  • 批准号:
    0802159
  • 财政年份:
    2008
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant
Collaborative Research: CDI-Type I: Realizing the Ultimate Potential of List Error-Correction: Theory, Practice, and Applications
合作研究:CDI-Type I:实现列表纠错的终极潜力:理论、实践和应用
  • 批准号:
    0835782
  • 财政年份:
    2008
  • 资助金额:
    $ 4.98万
  • 项目类别:
    Standard Grant

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