Collaborative Research: Secure and Efficient Post-quantum Cryptography: from Coding Theory to Hardware Architecture

在许多通信和存储系统中，公钥密码用于数字签名和安全信息交换，以确保数据的机密性、真实性和不可否认性。目前的公钥密码标准是基于大数因式分解或离散对数，这可以通过量子计算算法在多项式时间内求解。最近，量子处理器取得了实质性的进展，迫切需要新的密码方案来抵御量子计算攻击。该团队将在基于纠错码(ECC)的McEliess/Niederreiter密码学方面取得进展。该方法将基于低密度或中密度奇偶校验(LDPC或MDPC)ECC，这些ECC是最有希望抵抗量子计算攻击的方案之一。这些进展将通过将密码学和纠错编码理论的研究结合起来实现，从而消除对这些密码可能的后门和攻击。该团队还将开发高效和安全的硬件实现，这些实现对于在实际系统中广泛采用基于ECC的密码来说是不可或缺的。将解决不同构造的LDPC/MDPC码所带来的新挑战，并将研究先进的译码算法以释放这些密码系统的性能潜力。此外，还将开发低开销方案，以防止密钥从旁路信息中泄漏，例如实现密码的电路芯片的时序和功耗。该项目还将有助于培养在编码、加密和硬件架构设计方面熟练的劳动力，以满足美国日益增长的安全需求。参与的学生将接受高级工程培训，他们的教育经验将通过PI与他们的国际合作伙伴的密切合作而丰富。这一建议填补了基于ECC的后量子McEliess/Niederreiter密码系统在密码学、纠错编码理论和硬件架构设计方面的研究空白。通过整合理论研究、攻击分析和硬件架构设计，开发高效和高度安全的硬件实现。这种跨层设计方法使得开发前所未有的短延迟、小面积、低功耗和安全的基于ECC的密码系统成为可能。将首次从编码理论的角度全面研究可能的攻击，并针对现有的和新的潜在攻击开发低开销的缓解方法。考虑到基于ECC的密码系统中使用的代码的特殊性，将设计新的方法和解码调度方案，以显著提高硬件效率。为了使后量子密码学得到广泛的应用，将开发一个满足延迟、硅片面积和功耗等各种系统约束的基于ECC的密码系统的设计和实现框架。此外，与电路级方法相比，算法级的旁路攻击抵抗方法的开销要低得多，将通过利用LDPC/MDPC解码数据流和调度的变化来开发。这一奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Public-key ciphers are used for digital signature and secure information exchange in numerous communication and storage systems to ensure data confidentiality, authenticity, and non-repudiability. The current standards for public-key ciphers are based on large number factorization or discrete logarithm, which can be solved in polynomial time by a quantum computing algorithm. Substantial advancements have been made on quantum processors recently and there is imminent need of new cryptography schemes that are secure against quantum computing attacks. The team will make advances in error-correction code (ECC)-based McEliece/Niederreiter cryptography. The approach will be based on low or medium-density parity-check (LDPC or MDPC) ECCs that are among the most promising schemes resistant to quantum computing attacks. The advances will be achieved by coupling research on cryptography and error-correction coding theory, thus eliminating possible backdoors and attacks for these ciphers. The team will also develop efficient and secure hardware implementations that are indispensable in order to adopt the ECC-based ciphers broadly in practical systems. The new challenges posed by the different constructions of LDPC/MDPC codes for cryptographic purposes will be addressed and advanced decoding algorithms will be investigated to unleash the performance potential of these cryptosystems. Additionally, low-overhead schemes will be developed to prevent the leakage of secret key from side-channel information, such as the timing and power consumption of the circuit chip implementing the cipher. This project will also contribute to the development of workforce skilled in coding, cryptography and hardware architecture design for the growing security needs in the US. The participating students will receive advanced training in engineering, and their educational experiences will be enriched by close collaboration between the PIs and their international collaborators.This proposal fills the gaps among the research on cryptography, error-correction coding theory, and hardware architecture design for the ECC-based post-quantum McEliece/Niederreiter cryptosystems. Efficient and highly secure hardware implementations will be developed through integrating theoretical study, attack analysis, and hardware architecture design. Such a cross-layer design approach enables the development of unprecedented short-latency, small-area, low-power, and secure ECC-based cryptosystems. For the first time, possible attacks from coding theoretical perspective will be studied comprehensively and low-overhead mitigation methodologies will be developed for existing and new potential attacks. Taking into account the specifics of the codes utilized in the ECC-based cryptosystems, novel approaches and decoding scheduling schemes will be designed to substantially improve the hardware efficiency. A framework of design and implementation of the ECC-based cryptosystems satisfying various system constraints, such as latency, silicon area, and power consumption, will be developed to enable broad application of post-quantum cryptography. Moreover, algorithmic-level side-channel attack resistant approaches, which have much lower overheads compared to circuit-level methodologies, will be developed by exploiting the variations of LDPC/MDPC decoding data flow and scheduling.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.