Collaborative Research: Secure and Efficient Post-quantum Cryptography: from Coding Theory to Hardware Architecture

合作研究：安全高效的后量子密码学：从编码理论到硬件架构

• 批准号: 2052641
• 负责人: Xinmiao Zhang
• 金额: $ 24.5万
• 依托单位: Ohio State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-05-15 至 2025-04-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2052641&HistoricalAwards=false
• 关键词: Collaborative; Research; Secure; Efficient; Post

Public-key ciphers are used for digital signature and secure information exchange in numerous communication and storage systems to ensure data confidentiality, authenticity, and non-repudiability. The current standards for public-key ciphers are based on large number factorization or discrete logarithm, which can be solved in polynomial time by a quantum computing algorithm. Substantial advancements have been made on quantum processors recently and there is imminent need of new cryptography schemes that are secure against quantum computing attacks. The team will make advances in error-correction code (ECC)-based McEliece/Niederreiter cryptography. The approach will be based on low or medium-density parity-check (LDPC or MDPC) ECCs that are among the most promising schemes resistant to quantum computing attacks. The advances will be achieved by coupling research on cryptography and error-correction coding theory, thus eliminating possible backdoors and attacks for these ciphers. The team will also develop efficient and secure hardware implementations that are indispensable in order to adopt the ECC-based ciphers broadly in practical systems. The new challenges posed by the different constructions of LDPC/MDPC codes for cryptographic purposes will be addressed and advanced decoding algorithms will be investigated to unleash the performance potential of these cryptosystems. Additionally, low-overhead schemes will be developed to prevent the leakage of secret key from side-channel information, such as the timing and power consumption of the circuit chip implementing the cipher. This project will also contribute to the development of workforce skilled in coding, cryptography and hardware architecture design for the growing security needs in the US. The participating students will receive advanced training in engineering, and their educational experiences will be enriched by close collaboration between the PIs and their international collaborators.This proposal fills the gaps among the research on cryptography, error-correction coding theory, and hardware architecture design for the ECC-based post-quantum McEliece/Niederreiter cryptosystems. Efficient and highly secure hardware implementations will be developed through integrating theoretical study, attack analysis, and hardware architecture design. Such a cross-layer design approach enables the development of unprecedented short-latency, small-area, low-power, and secure ECC-based cryptosystems. For the first time, possible attacks from coding theoretical perspective will be studied comprehensively and low-overhead mitigation methodologies will be developed for existing and new potential attacks. Taking into account the specifics of the codes utilized in the ECC-based cryptosystems, novel approaches and decoding scheduling schemes will be designed to substantially improve the hardware efficiency. A framework of design and implementation of the ECC-based cryptosystems satisfying various system constraints, such as latency, silicon area, and power consumption, will be developed to enable broad application of post-quantum cryptography. Moreover, algorithmic-level side-channel attack resistant approaches, which have much lower overheads compared to circuit-level methodologies, will be developed by exploiting the variations of LDPC/MDPC decoding data flow and scheduling.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

公钥密码在许多通信和存储系统中用于数字签名和安全信息交换，以确保数据的机密性，真实性和不可否认性。公钥密码的当前标准是基于大数因子分解或离散对数，可以通过量子计算算法在多项式时间内求解。最近量子处理器取得了实质性的进展，迫切需要新的加密方案，以防止量子计算攻击。该团队将在基于纠错码（ECC）的McEliece/Niederreiter密码学方面取得进展。该方法将基于低或中密度奇偶校验（LDPC或MDPC）ECC，这些ECC是抵抗量子计算攻击的最有前途的方案之一。这些进展将通过密码学和纠错编码理论的耦合研究来实现，从而消除这些密码可能的后门和攻击。该团队还将开发高效和安全的硬件实现，这对于在实际系统中广泛采用基于ECC的密码是必不可少的。LDPC/MDPC码的不同结构所带来的新的挑战将被解决，先进的解码算法将被调查，以释放这些密码系统的性能潜力。此外，低开销的方案将被开发，以防止泄漏的秘密密钥从侧信道信息，如时序和功耗的电路芯片实现密码。该项目还将为美国不断增长的安全需求提供编码，密码学和硬件架构设计方面的技术人才。参与的学生将接受高级工程培训，并通过PI与国际合作者的密切合作丰富他们的教育经验。该提案填补了基于ECC的后量子McEliece/Niederreiter密码系统在密码学、纠错编码理论和硬件架构设计方面的研究空白。通过理论研究、攻击分析和硬件架构设计相结合，开发高效、高安全性的硬件实现。这种跨层设计方法使得前所未有的短延迟，小面积，低功耗和安全的基于ECC的密码系统的开发成为可能。第一次，从编码理论的角度可能的攻击将被全面研究，并将为现有的和新的潜在攻击开发低开销的缓解方法。考虑到ECC密码系统中使用的代码的具体情况，将设计新的方法和解码调度方案，以大大提高硬件效率。基于ECC的密码系统的设计和实现的框架，满足各种系统的约束，如延迟，硅面积，和功耗，将开发，使广泛的应用后量子密码。此外，算法级的抗边信道攻击的方法，这有更低的开销相比，电路级的方法，将开发通过利用LDPC/MDPC解码数据流和调度的变化。这一奖项反映了NSF的法定使命，并已被认为是值得通过评估使用基金会的智力价值和更广泛的影响审查标准的支持。

项目成果

Hardware Circuits and Systems Design for Post-Quantum Cryptography—A Tutorial Brief

• DOI: 10.1109/tcsii.2024.3357836
• 发表时间: 2024-03
• 期刊: IEEE Transactions on Circuits and Systems II: Express Briefs
• 作者: Jiafeng Xie;Wenfeng Zhao;Hanho Lee;Debapriya Basu Roy;Xinmiao Zhang

Sparsity-Aware Medium-Density Parity-Check Decoder for McEliece Cryptosystems

适用于 McEliece 密码系统的稀疏感知中密度奇偶校验解码器

• DOI: 10.1109/tcsii.2023.3264578
• 发表时间: 2023
• 期刊: IEEE Transactions on Circuits and Systems II: Express Briefs
• 作者: Zhang, Xinmiao;Xie, Zhenshan
• 通讯作者: Xie, Zhenshan

Low-Complexity Parallel Min-Sum Medium-Density Parity-Check Decoder for McEliece Cryptosystem

适用于 McEliece 密码系统的低复杂度并行最小和中密度奇偶校验解码器

• DOI: 10.1109/tcsi.2023.3319358
• 发表时间: 2023
• 期刊: IEEE Transactions on Circuits and Systems I: Regular Papers
• 作者: Cai, Jiaxuan;Zhang, Xinmiao
• 通讯作者: Zhang, Xinmiao

Efficient Check Node Processing for Min-Max NB-LDPC Decoding over Lower-Order Finite Fields

低阶有限域上最小-最大 NB-LDPC 解码的高效校验节点处理

• 发表时间: 2022
• 期刊: Proceedings IEEE International Symposium on Circuits and Systems
• 作者: Zhang, X

A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures

高吞吐量非二进制 LDPC 解码器调查：ASIC、FPGA 和 GPU 架构

• DOI: 10.1109/comst.2021.3126127
• 发表时间: 2021
• 期刊: IEEE Communications surveys and tutorials
• 影响因子: 35.6
• 作者: Ferraz, O.;Subramaniyan, S.;Chinthalaa, R.;Andrade, J.;Cavallaro, J. R.;Nandy, S. K.;Silva, V.;Zhang, X.;Falcao, G.
• 通讯作者: Falcao, G.