SHF: Small: An Adaptive Architecture Fabric for Constructing Resilient Multicore Systems
SHF: Small: An Adaptive Architecture Fabric for Constructing Resilient Multicore Systems
批准号:
0916689
负责人:
Scott Mahlke
金额:
$45.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-01 至 2013-08-31
中文摘要
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英文摘要
As semiconductor technologies scale continues to shrink, building fault-tolerant, defect-free microprocessors becomes increasingly difficult. Tighter design constraints, lower operating voltages, and increasing power densities have lead to circuits that are more susceptible to manufacturing defects, transient faults, and wearout-related failures. It is anticipated that future designs will consist of 100 billion transistors, many of which will be unusable due to manufacturing defects and many will fail over time due to wearout and other errors. Traditional mainframes and mission-critical systems rely on redundancy to overcome such failures. Reliability is essentially viewed as a tax that is levied in the form of additional silicon area devoted to constant double and triple checking of results that end-users must pay to ensure correct operation. As reliability concerns invade the desktop and cellphone environments, large scale redundancy is impractical due to the high cost and energy overheads. This research proposes StageNet, a new style of microprocessor architecture in which reliability is not a tax, but rather built in to the natural operation of the system. StageNet is both introspective to enable continuous monitoring and adaptation to reliability hazards and reconfigurable at a fine-grain level to minimize the lifetime performance impact that individual failures have on the system. StageNet consists of three major components: an adaptive computing substrate that enables dynamic reorganization of individual microprocessors, armored cache designs to provide high defect tolerance with low area overhead for on-chip caches, and a dynamic adaptation system to manage the execution of applications and organization of the hardware over its lifetime. The broader impact of this research is that it creates cost-effective ways of dealing with faulty transistors that will enable the proliferation of embedded computers into more aspects of life, where robustness and reliability are current barriers.
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