SHF: Medium: Say "No" to Extraction--A Transformative Circuit Simulation Paradigm Guided by First Principles
SHF: Medium: Say "No" to Extraction--A Transformative Circuit Simulation Paradigm Guided by First Principles
批准号:
1065318
负责人:
Cheng-Kok Koh
金额:
$80.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-03-15 至 2016-02-29
中文摘要
在过去的几十年里,集成电路已经从以非线性电路为主导发展到以线性网络为主导,因为集成电路中的晶体管和互连的缩放。然而,主流的电路仿真范式仍然由SPICE(集成电路重点仿真程序)主导,它非常有能力解决有源设备仿真的非线性函数,但在跟上线性网络的增长方面存在困难,因为(1)互连的绝对数量-每个添加的设备都必须连接;(2)描述互连的模型越来越复杂——每个增加的互连转换成许多电路参数,即电阻、电容和电感,以及(3)从布局中提取线性网络的电路参数产生的高度不规则的大规模系统矩阵。这些模型产生的高度不规则的大尺度系统矩阵使得现有的电路模拟器在仿真中不可能达到最优的复杂度(即时间和空间上的线性复杂度)。本提案旨在开发一种变革性电路仿真范例,不仅提供无与伦比的效率,而且提供前所未有的准确性,克服现有仿真框架的缺点。在基于物理的第一原理的指导下,pi建议绕过提取线性网络的步骤。直接从布局到仿真,这种无需提取的方法允许对系统矩阵进行无需计算的分解,从而使电路模拟器在时间和空间上具有线性复杂性或最佳复杂性。通过在多核节点或此类节点的集群上并行实现转换电路模拟器,可以实现进一步的加速。该项目将提供一个公共领域的电路模拟器,可以充分考虑非线性器件、基板、片上互连和封装之间的相互作用;从而有助于在未来几年内在全电磁频谱中持续扩展和集成电路横切数字、模拟和射频技术。变革性电路模拟器在公共领域的可用性将丰富未来电路设计师在高等教育管道中进步的学习经验。此外,与普渡大学的多元化项目合作,将开发包含电路、电磁学和计算机相关基本概念的夏令营项目,以扩大未被充分代表的少数族裔和女性学生在计算机和工程领域的参与。通过本科生和研究生积极参与项目,并将研究成果整合到本科研究生课程中,学生将在电路、电磁学、数值线性代数和多核计算等领域获得广泛的技能训练。
英文摘要
Over the last few decades, integrated circuits (IC) have progressed from being dominated with nonlinear circuits to being dominated with linear networks because of the scaling of transistors and interconnects in ICs. However, the prevailing circuit simulation paradigm is still heavily dominated by SPICE (Simulation Program with Integrated Circuit Emphasis), which is very capable of solving nonlinear functions for the simulation of active devices, but has difficulties in keeping up with the growth in the linear network because of (1) the sheer volume of interconnects--every device added has to be connected, (2) the growing sophistication of the models describing the interconnects--every added interconnect translates into many circuit parameters, i.e., resistances, capacitances, and inductances, and (3) the highly irregular large-scale system matrices arising from the extraction of circuit parameters for a linear network from the layout. The highly irregular large-scale system matrices arising from such models make it unlikely for the existing circuit simulator to achieve the optimal complexity (i.e., linear complexity in time and space) in simulation.This proposal seeks to develop a transformative circuit simulation paradigm that offers not only unparalleled efficiency but also unprecedented accuracy, overcoming the shortcomings of the existing simulation frameworks. Guided by physics-based first principles, the PIs propose to bypass the step of the extraction of the linear network. Going directly from layout to simulation, such an extraction-free methodology allows for a computation-free decomposition of the system matrix, thus enabling a circuit simulator of linear complexity or optimal complexity in time and space.Further speedup is achieved with an embarrassingly parallel implementation of the transformative circuit simulator on a many-core node or a cluster of such nodes. This project will deliver a public-domain circuit simulator that can fully account for the interactions between nonlinear devices, substrate, on-die interconnects, and package; thereby contributing to the continued scaling and integration of circuits crosscutting digital, analog, and RF technologies across full electromagnetic spectrum for years to come.The availability of the transformative circuit simulator in the public domain will enrich the learning experience of future circuit designers progressing through the pipeline of higher education. Moreover, in partnership with the diversity programs at Purdue, summer camp projects that embed essential concepts related to circuits, electromagnetics, and computing will be developed to broaden the participation of underrepresented minority and women students in computing and engineering. Through the active involvement of undergraduate and graduate students in the project and the integration of research results into the undergraduate graduate curricula, students will be trained with a broad range of skills, in areas such as circuits, electromagnetics, numerical linear algebra, and many-core computing.
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SHF: Small: Synthesis of Robust Clock Networks for Multiple-Corner Multiple-Mode Designs
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批准号:1527562
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项目类别:Standard Grant
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资助金额:$30.0万
-
财政年份:2015
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负责人:Cheng-Kok Koh
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依托单位:
CI-ADDO-NEW: Collaborative Research: Development of DARwIn Humanoid Robots for Research, Education and Outreach
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批准号:0958487
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项目类别:Continuing Grant
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资助金额:$40.0万
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财政年份:2010
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负责人:Cheng-Kok Koh
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依托单位:
Reliability Analysis and Robust Synthesis of HIgh-Performance Clock Networks.
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批准号:0203362
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项目类别:Continuing Grant
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资助金额:$24.0万
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财政年份:2002
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负责人:Cheng-Kok Koh
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依托单位:
Career: Interconnect Planning and Synthesis of Physical Layout for Deep Submicron VLSI Design
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批准号:9984553
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项目类别:Continuing Grant
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资助金额:$35.12万
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财政年份:2000
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负责人:Cheng-Kok Koh
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依托单位:
海外基金