SHF: Small: Coordinated Performance Optimization within a Power Budget for Chip Multiprocessors

SHF：小型：芯片多处理器功率预算内的协调性能优化

• 批准号: 1143605
• 负责人: Xiaorui Wang
• 金额: $ 25.54万
• 依托单位: Ohio State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-06-01 至 2014-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1143605&HistoricalAwards=false
• 关键词: SHF; Small; Coordinated; Performance; Optimization

Since power consumption has become a major constraint for the further throughput improvement of chip multiprocessors (CMPs), a key challenge is to optimize the performance of a CMP within a power budget limited by the CMP's cooling, packaging, and power supply capacities. This project aims to develop a coordinated power control framework for CMPs. The proposed framework has the following novel features. 1) It can dynamically and explicitly shift power among the CPU cores and other components in a CMP based on measured workload characteristics for optimized CMP performance within a power budget. 2) It adopts an online model estimator to dynamically measure the performance contributed by each component and then partitions the chip-level power budget among the components. 3) It can achieve fair or differentiated cache sharing under the impacts of dynamic cache resizing used in CMP power control. 4) It also coordinates components within a core for core-level power control and coordinates CMPs with main memory and disks for optimized system performance. 5) Our framework is based on a control-theoretic foundation for systematically and rigorously developing power control strategies. While basic control theory has already shown great promise in microprocessor power management, an important feature of our framework is that it relies on advanced optimal control theory to coordinate multiple control and optimization loops in different layers of a CMP in a holistic way for optimized performance and guaranteed stability. In addition to integrating research with education and outreach programs, the outcome of this research is expected to provide effective mechanism and a rich set of tools fer performance and power optimization in CMPs.

由于功耗已成为芯片多处理器（CMP）的进一步吞吐量提高的主要制约因素，一个关键的挑战是优化性能的CMP的冷却，封装和电源供应能力的限制下的功率预算。本项目旨在为CMP开发一个协调的功率控制框架。拟议的框架具有以下新特点。1)它可以根据测量的工作负载特性，在CPU内核和CMP中的其他组件之间动态显式地转移功率，以在功率预算内优化CMP性能。2)它采用在线模型估计器来动态测量每个组件的性能贡献，然后在组件之间划分芯片级功耗预算。3)在CMP功率控制中使用的动态缓存策略的影响下，可以实现公平或差异化的缓存共享。4)它还协调核心内的组件以实现核心级功率控制，并协调CMP与主内存和磁盘以优化系统性能。5)我们的框架是基于控制理论的基础上，系统和严格的开发功率控制策略。虽然基本控制理论已经在微处理器电源管理方面显示出很大的潜力，但我们框架的一个重要特征是，它依赖于先进的最优控制理论，以整体方式协调CMP不同层中的多个控制和优化循环，以优化性能并保证稳定性。除了将研究与教育和推广计划相结合外，本研究的结果有望为CMP的性能和功率优化提供有效的机制和丰富的工具。