Collaborative Research: On-chip Multi-channel Millimeter-wave Wireless Links for Multi-core Platforms

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INTELLECTUAL MERIT: With the well-known trend of continued CMOS scaling, as per Moore?s Law, traditional on-chip interconnect systems are projected to soon reach the point of having a very limited ability to meet the performance needs and specifications of emerging many-core processors. According to the International Technology Roadmap for Semiconductors (ITRS), for the longer term, material innovation with traditional scaling will no longer satisfy performance requirements and new interconnect paradigms will be needed. The computing capabilities of many-core systems can be harnessed only if the underlying on-chip communication links can perform at an acceptable level of power performance efficiency. To address this problem, design of high-bandwidth, long-range and multi-channel millimeter (mm)-wave on-chip wireless links as communication backbones targeted for many-core chips is proposed. The research goals of this proposal will be achieved by: (1) Designing on-chip, highly efficient, single and multiband miniaturized antennas for high throughput on-chip data transfer; fabrication, testing and evaluation of prototype antennas including on-chip inkjet-printed antennas and (2) Designing mm-wave transceivers that enable multiple non-overlapping, low power, broadband wireless links and performance evaluation of small-world wireless Network-on-Chip (WiNoC) architectures. BROADER IMPACTS: This proposal addresses the design of on-chip mm-wave wireless communication links to support power efficient design of massive multi-core chips. Multi-core processing platforms have emerged to meet the performance needs of many important applications such as graphics, financial and scientific modeling, biomonitoring, networking, multimedia and wireless infrastructure. These diverse applications will benefit from the low latency, low power on-chip communication infrastructure proposed in this work. The proposed research will enhance the education of undergraduate and graduate students by allowing them to apply classroom knowledge to research problems. As part of its Tera-scale Computing Research Program, Intel is actively pursuing several projects on scalable multi-core architectures. Consequently, the proposed work aligns with an important thrust area within Intel. Students from various underrepresented groups, including women, African Americans and Hispanics will be engaged in this project. The project?s positive educational impacts will be complemented by the positive effect that the research outcomes are expected to have on society as a whole. Outcomes of the research will be broadly disseminated. In addition to publication in peer-reviewed journals, results will be presented at internationally recognized conferences.