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CAREER: Process, Voltage, and Temperature (PVT)-Tolerant CMOS Photonic Interconnect Transceiver Architectures

CAREER: Process, Voltage, and Temperature (PVT)-Tolerant CMOS Photonic Interconnect Transceiver Architectures
职业:耐工艺、电压和温度 (PVT) 的 CMOS 光子互连收发器架构
批准号:
1254830
负责人:
Samuel Palermo
金额:
$40.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2013
资助国家:
美国
项目状态:
已结题
起止时间:
2013-05-01 至 2019-04-30

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Intellectual Merit: The photonic interconnect architectures and design techniques proposed here aim to significantly improve interconnect robustness, energy efficiency, and bandwidth density, which is necessary for continued scaling of future computer systems. While progress has been made in photonic interconnects, the optimal interconnect architecture which most efficiently leverages these optical devices for off-chip and network-on-chip applications is still an open question. This work?s research goal is to develop robust energy-efficient transceivers for a unified inter- and intra-chip photonic interconnect architecture based on integrated ring resonator modulators and waveguide photodetectors. To accomplish this goal, an ultra-fast system-level optimization framework for photonic on-chip networks and inter-chip links that investigates trade-offs in bandwidth density, energy efficiency, and interconnect throughput will be developed to compare photonic interconnect technologies and leveraged in the design of the proposed architecture. Novel circuit topologies will be developed that address challenges imposed due to nanometer transistor scaling properties, such as transistor reliability constraints conflicting with voltage-swing requirements of optical source devices and shrinking transistor gain and growing mismatch having a large impact on receiver sensitivity. The combination of system level optimization with circuit-level accuracy and new ultra-efficient circuit topologies enables architectures capable of leveraging photonic interconnects? properties of extreme low latency and high bandwidth to realize completely new computing models with orders of magnitude performance improvement.Broader Impact: The explosion in interconnect bandwidth capacity provided by this photonic interconnect architecture will allow the realization of numerous transformative applications, such as future smart mobile devices capable of Tflop/s performance, multi-channel high-resolution magnetic resonance imaging, and exascale supercomputers. Interconnect architectures developed with the proposed optimization framework will have a broad impact on not only the US semiconductor industry, but also on the sustainability and security of the nation as a whole, as it will dramatically reduce the energy these integrated systems demand. This project will include an interdisciplinary educational program involving 1 Ph.D. and 5 undergraduate students, with a commitment in several engaging outreach activities to foster the representation of women and minority groups. These activities include participating in a four-week summer workshop for K-12 school teachers and also annual one-week summer camps for high school students. Project results will be broadly disseminated by inclusion in the syllabi and website of a new graduate course entitled ?Optical Interconnect Circuits and Systems? and through publication in national and international journals and conferences.
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ACED Fab: Co-Design of Novel Electronic-Photonic Systems for Energy-Efficient Coherent Optical Interconnects
EARS: A Wideband Frequency-Agile Silicon Photonic mm-Wave Receiver with Automatic Jammer Suppression via Rapidly Reconfigurable Optical Notch Filters
Advanced Modeling and Design of High-Performance ADC-Based Serial Links
国内基金
海外基金
Neural Process模型的多样化高保真技术研究
磁转动超新星爆发中weak r-process的关键核反应
多臂Bandit process中的Bayes非参数方法
  • 批准号:
    71771089
  • 项目类别:
    面上项目
  • 资助金额:
    48.0万元
  • 批准年份:
    2017
  • 负责人:
    吴贤毅
  • 依托单位: