SHF: Medium: ASKS - Architecture Support for darK Silicon

SHF：中：ASKS - 对 darK Silicon 的架构支持

• 批准号: 1409798
• 负责人: Yuan Xie
• 金额: $ 90万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2014
• 资助国家: 美国
• 起止时间: 2014-08-01 至 2014-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1409798&HistoricalAwards=false
• 关键词: SHF; Medium; ASKS; Architecture; Support

The proposed ASKS (Architecture Support for darK Silicon) project proposes architectural support for future many-core microprocessors designed with and around emerging technologies to address the challenges of the coming dark silicon revolution. Future many-cores, to stay on the historical performance curve, will contain more transistors than can all be sustainably powered at the same time. Thus, we face the prospect of ?dark silicon,? wherein some of a chip?s components must be powered-off (darkened) in order to stay within the chip?s power/thermal budget. Ensuring peak performance under these circumstances is a challenging task. In particular, in an architecture with different types of components (cores, caches, network on chip (NoC, or on-chip interconnet), memory controllers, etc.), there can be many different on-dim-dark configurations within the power budget. However, these can exhibit significantly varying performances. Additionally, the power consumption of uncore components (shared caches, on-chip interconnect, memory architecture) is significant, thus the uncore components play an important role in joint performance/power/thermal optimization. Therefore, a more inclusive approach is needed. Our architectural design space exploration will mainly focus on the uncore space (shared caches, on-chip interconnect structures, memory architecture), targeting future NoC-based many-core microprocessors that exploit the emerging technologies of 3D die-stacking (3D IC) and non-volatile memories (NVM). This project will advance the state of the art in preparing for the dark silicon revolution in two main aspects. 1) Cross-layer holistic optimization with a focus on uncore components: The uncore components play important roles in joint performance/power/thermal optimization. This project proposes an integrated approach in which the cores and uncore components collaborate to maximize performance under power and thermal constraints as well as under dynamically changing program behavior and execution parameters. 2) Investigating dark silicon in the context of emerging technologies: Emerging 3D ICs and NVM technologies are envisioned as promising ways to design future many-core architectures. The adoption of such emerging technologies poses new challenges for dark silicon (such as aggravated thermal profiles in 3D stacked chips), but also brings new opportunities for architectural innovations such as novel power management techniques and greater exploitation of memory system heterogeneity. The broader impact of this project includes the contribution to the increased performance for future microprocessors even in the face of the coming dark silicon revolution. Through close collaboration with several industry partners, the PIs envision direct transfer of many ideas to industry. The tools and techniques developed in this project will be used in teaching existing courses and developing new courses, and will be made available through the web for use by other educators, researchers, and industry practitioners. Dissemination of research findings will also be carried out through conference tutorials, panel discussions, and workshops. A concerted effort will be made to involve under-represented groups and undergraduate students in this research.

拟议中的ASKS（暗硅架构支持）项目提出了对未来众核微处理器的架构支持，这些微处理器采用和围绕新兴技术设计，以应对即将到来的暗硅革命的挑战。未来的众核，为了保持历史性能曲线，将包含更多的晶体管，而不是同时可持续供电。 因此，我们面临的前景？暗硅，？其中一些芯片？的组件必须断电（变暗），以留在芯片？的功率/热预算。在这种情况下确保最佳性能是一项具有挑战性的任务。具体地，在具有不同类型的组件（核、高速缓存、片上网络（NoC或片上互连）、存储器控制器等）的架构中，在功率预算内可以有许多不同的开-暗-暗配置。然而，这些可以表现出显著不同的性能。此外，非核组件（共享高速缓存、片上互连、存储器架构）的功耗是显著的，因此非核组件在联合性能/功耗/热优化中发挥重要作用。因此，需要采取更具包容性的办法。我们的架构设计空间探索将主要集中在非核心空间（共享高速缓存，片上互连结构，存储器架构），针对未来的基于NoC的众核微处理器，利用新兴技术的3D芯片堆叠（3D IC）和非易失性存储器（NVM）。该项目将在两个主要方面推进暗硅革命的准备工作。1)以非核心组件为重点的跨层整体优化：非核心组件在性能/功耗/散热联合优化中发挥重要作用。该项目提出了一种集成的方法，在这种方法中，核心和非核心组件合作，以最大限度地提高性能的功率和热量的限制，以及根据动态变化的程序行为和执行参数。 2)在新兴技术的背景下研究暗硅：新兴的3D IC和NVM技术被认为是设计未来众核架构的有前途的方法。这些新兴技术的采用为暗硅带来了新的挑战（例如3D堆叠芯片中的热分布加剧），但也为架构创新带来了新的机遇，例如新型电源管理技术和更大程度地利用存储器系统异构性。该项目更广泛的影响包括即使面对即将到来的暗硅革命，也能提高未来微处理器的性能。 通过与几个行业合作伙伴的密切合作，PI设想将许多想法直接转移到行业。 本项目中开发的工具和技术将用于现有课程的教学和新课程的开发，并将使 可通过网络提供给其他教育工作者、研究人员和行业从业者使用。还将通过会议指导、小组讨论和讲习班传播研究成果。将作出协调一致的努力，让代表性不足的群体和本科生参与这项研究。