SHF: Small: Introducing Next Generation I/O Accelerator

大数据应用需要高速、可靠、节能的数据存储系统。由于传统系统以旋转硬盘驱动器为中心，传统存储架构具有根本性的局限性。随着 NAND 门闪存、相变存储器、忆阻器和磁性 RAM 等非易失性存储器技术的快速发展，为变革存储架构带来了巨大的机遇。本研究的目的是启动存储架构的范式转变，以满足大数据应用日益增长的需求。预计未来的存储系统将具有机器智能，可以在运行时动态学习、分析、预测和控制系统。引入机器智能的新型加速器架构可实现存储数据操作的高速处理，这对于一般的高性能计算，特别是大数据计算至关重要。 新推出的 I/O 加速器位于多核 CPU 芯片或存储控制器板上，可实现足够准确的预测，从而有效优化存储 I/O。凭借新的架构特性，所提出的 I/O 加速器可以以与新兴非易失性存储器相当的速度执行复杂的 I/O 任务，这对于 I/O 性能至关重要，因为它不再像旋转磁盘那样以毫秒为单位运行。该项目将探索和实现I/O加速器，该加速器可以有效处理与不同存储技术、应用工作负载的巨大变化、不同的可靠性/可用性要求以及各种存储组件的功耗相关的复杂性和高维度因素。其结果是一个新的异构存储架构，针对未来的计算基础设施进行了优化。 以加速器作为推动者，将研究全面的方法，主动学习系统行为，以预测长期趋势并快速响应快速变化的 I/O 事件。 新架构被认为是第一个通过以下方式提供动态优化的类型：1）跨异构设备的智能数据放置和替换，2）针对应用程序工作负载的最佳资源分配和配置，3）基于内容局部性的有效重复数据删除，以及4）适应不同数据类型的数据保护和恢复的智能策略决策。此外，新的加速器可以在主动存储系统中实现快速的现场数据分析。该研究项目预计将产生以下更广泛的影响：1）在当今的云计算和大数据应用中，服务器产生大量的I/O，可以充分利用新的存储架构。 2）新的加速器可以集成到许多核心CPU中，作为未来异构处理器的专用核心。 3）新的存储架构将加速新兴存储类存储器的采用。 4）新方法将激发更多将机器学习应用于存储系统的研究。 5) 新的以 CPU 和数据为中心的计算机工程课程将为研究生和本科生提供满足现实世界需求的培训。 6) 外展计划将延续之前 NSF 项目的成功故事，以帮助罗德岛州和国家的经济发展。

Big data applications demand high speed, reliable, and energy efficient data storage systems. Traditional storage architectures have fundamental limitations because of legacy systems that have centered on spinning hard disk drives. With rapid advances in nonvolatile memory technologies such as NAND-gate flash, phase change memory, Memristor, and magnetic RAM, a great opportunity arises for revolutionizing storage architectures. The objective of this research is to start a paradigm shift in storage architecture to meet the increasing demand of big data applications. It is envisioned that future storage systems will have machine intelligence that learns, analyzes, predicts, and controls the system at runtime dynamically. A novel accelerator architecture is introduced with machine intelligence to enable high speed processing of storage data operations that are critical to high performance computing in general and big data computing in particular. The newly introduced I/O accelerator, residing either in a many-core CPU chip or on a storage controller board, enables sufficiently accurate predictions for effective optimization of storage I/Os. With new architecture features, the proposed I/O accelerator can carry out complicated I/O tasks in the speed comparable to the emerging nonvolatile memories, which is critical to I/O performance because it no longer operates in milliseconds as spinning disks do. The project will explore and implement the I/O accelerator that can effectively deal with the complexity and high dimensionality of factors related to diverse storage technologies, a large variation of application workloads, different reliability/availability requirements, and power consumptions of various storage components. The result is a new heterogeneous storage architecture that is optimized for future computing infrastructure. With the accelerator as an enabler, comprehensive methodology will be investigated that proactively learns system behavior to anticipate long-term trends and to respond quickly to fast changing I/O events. The new architecture is believed to be the first of the kind providing dynamic optimizations by means of 1) intelligent data placements and replacements across heterogeneous devices, 2) optimal resource allocation and provisioning to applications' workloads, 3) effective data deduplication based on content locality, and 4) smart policy decision on data protection and recovery adaptive to different data types. Furthermore, the new accelerator enables fast in-situ data analytics in active storage systems. This research project is expected to have the following broader impacts: 1) In today's cloud computing and big data applications, servers generate a large amount of I/Os that can take full advantage of the new storage architecture. 2) The new accelerator can be incorporated into many core CPUs as a specialized core for future heterogeneous processors. 3) The new storage architecture will speed up the adoption of emerging storage class memories. 4) The new methodology will stimulate more research in applying machine learning to storage systems. 5) The new CPU-and-data centric Computer Engineering curriculum will train both graduate and undergraduate students for real world needs. 6) The outreach program will continue the success stories of prior NSF projects to help the economic development of the state of Rhode Island and the nation.