Collaborative Research: nm Electron Wave Devices for Low-Power VLSI Electronics

合作研究：用于低功耗超大规模集成电路电子器件的纳米电子波器件

• 批准号: 1509288
• 负责人: Mark Rodwell
• 金额: $ 18万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-09-15 至 2018-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1509288&HistoricalAwards=false
• 关键词: Collaborative; Research; nm; Electron; Wave

Transistors are the key element in modern integrated circuits (ICs). Since a typical circuit has billions of transistors, heat generated during transistor operation limits how fast the chip can operate and how many transistors it can contain. Industry is seeking a transistor design with the lowest possible power-supply voltage and the smallest amount of leakage current when it is off. To switch quickly, it must provide large currents when it is on. The ratio of off-current to on current is determined by a factor called the sub-threshold swing (SS); in a normal transistor the SS is limited to 0.06 Volts per decade, i.e. each factor of 10:1 in the on-off ratio requires 0.06 Volts power supply voltage, and a typical 10 to the eighth on/off ratio requires 8*0.06V, or about 0.5 Volts. Tunnel transistors have been proposed to reduce the SS, but these have small on-currents because the probability of an electron tunneling, hence contributing to current, is very small. An electron which does not tunnel through the transistor is instead reflected. Exploiting the wave nature of electrons, we will suppress the reflection by using additional reflectors, in a structure much like the coatings which suppress the reflection from light from the surface of a camera lens. If the electron is not reflected, it instead passes through the transistor, and the on-current is increased. We will also develop another low-SS transistor, a superlattice transistor, which exploits electron wave properties to block transmission when the transistor is off but not when it is on. Success in the project would allow a ~5:1 reduction in IC power consumption, leading to faster, bigger, and more useful chips benefitting computers. This is a key broader impact. An intellectual broader impact is the use of fundamental physics, electron quantum interference in a device of vast public application. REU and summer internships are another broader impact. The project seeks to replace the modern transistor in VLSI, a vast industry, with a new device, operating at lower voltage, for low switching power, yet giving low off-state current, for low standby power, and high on current, for high speed. One proposed transistor is a tunnel-FET, which has low operating voltage but low on-current, with added electron wave reflectors which cause destructive interference of the reflected electron wave. This suppresses electron reflection, hence increases transmission, hence on-current. The second transistor uses a superlattice in the electron source to suppress hot electrons, thereby producing on:off characteristics sharper than a Boltzmann distribution. This allows large on:off ration at low voltages. We will model (simulate) design, build and test these transistors. Modelling will use quantum transport simulators (NEMO) with the addition of scattering. Fabrication requires standard FET fabrication processes (well established at UCSB), but adds electron energy filters formed either during MBE channel growth or during MOCVD regrowth of the transistors. The intellectual significance is clear: coherent electron effects as the basis of a mass-market electron device.

晶体管是现代集成电路（IC）中的关键元件。由于一个典型的电路有数十亿个晶体管，晶体管工作时产生的热量限制了芯片的工作速度和它可以包含多少个晶体管。工业界正在寻求一种晶体管设计，它具有尽可能低的电源电压和关断时最小的漏电流。 关断电流与导通电流的比率由一个称为亚阈值摆幅（SS）的因素决定;在正常晶体管中，SS被限制为每十倍0.06伏，即通断比中的每个10：1的因素需要0.06伏的电源电压，而典型的10的八分之一通断比需要8*0.06V，或约0.5伏。 已经提出了隧道晶体管来减少SS，但是这些具有小的导通电流，因为电子隧穿的概率非常小，因此对电流有贡献。 没有隧穿晶体管的电子被反射。利用电子的波动性质，我们将通过使用额外的反射器来抑制反射，其结构非常类似于抑制来自照相机透镜表面的光的反射的涂层。如果电子没有被反射，它就会通过晶体管，导通电流就会增加。我们还将开发另一种低SS晶体管，即超晶格晶体管，该晶体管利用电子波特性在晶体管关闭时阻止传输，而在晶体管开启时则不会。该项目的成功将使IC功耗降低约5：1，从而使更快，更大，更有用的芯片受益于计算机。这是一个关键的更广泛的影响。一个更广泛的知识影响是基础物理学的使用，电子量子干涉在一个广泛应用的装置中。REU和暑期实习是另一个更广泛的影响。该项目旨在用一种新器件取代超大规模集成电路（VLSI）中的现代晶体管，这种新器件在较低电压下工作，开关功率低，但关态电流低，待机功率低，导通电流高，速度快。 一种提出的晶体管是隧道FET，其具有低工作电压但低导通电流，具有增加的电子波反射器，其引起反射电子波的相消干涉。这抑制了电子反射，因此增加了传输，因此增加了导通电流。第二晶体管在电子源中使用超晶格来抑制热电子，从而产生比玻尔兹曼分布更尖锐的通断特性。这允许在低电压下的大的开：关比。我们将模拟设计、制造和测试这些晶体管。 建模将使用量子传输模拟器（NEMO），并添加散射。 制造需要标准的FET制造工艺（在UCSB建立良好），但增加了在MBE沟道生长期间或在晶体管的MOCVD再生长期间形成的电子能量过滤器。 其知识意义是明确的：相干电子效应作为大众市场电子设备的基础。