SHF: Medium: Booleanized Verification of Analog/Mixed Signal Systems
SHF: Medium: Booleanized Verification of Analog/Mixed Signal Systems
批准号:
1563812
负责人:
Jaijeet Roychowdhury
金额:
$90.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2016
资助国家:
美国
项目状态:
已结题
起止时间:
2016-07-15 至 2021-06-30
中文摘要
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英文摘要
Almost all electronic equipment today, particularly portable devices such as smartphones, tablets etc., contain not only billions of tiny switches called transistors, but also a number of critical analog/mixed-signal (AMS) circuits. Designing AMS circuits is usually far more difficult than designing digital circuits; they require specially trained designers in short supply, much longer design times, and often require several design iterations. Furthermore, when embedded in a chip with digital circuits, malfunctions stemming from unforeseen digital-analog interactions are common and difficult to pinpoint. This research aims to address the problem of making AMS design and debug easier, more reliable, and faster. Success of this research should provide a powerful boost to electronic design technology, eventually resulting in more complex and useful gadgets at lower cost. Moreover, this research will help train a number of graduate and undergraduate students, thus helping to develop the future workforce for electronic design automation industry. Outreach activities to be undertaken in this context will also help attract high-school students to STEM areas.The key technical idea behind this project is to model AMS components accurately as digital ones; and then to use digital techniques, which are much easier to use and faster, for debugging and design. The project will pursue two broad directions within this paradigm: 1) develop better and more accurate Booleanization techniques for approximating AMS circuits and systems as digital ones; and 2) develop better techniques for determining if the Booleanized/digital models work correctly or not.
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