SHF: Small: Exploiting the Negative Capacitance in a new Ferroelectric Device to Explore Innovative Design Solutions beyond the Fundamental Thermionic Limit of CMOS Technology

在过去的60年里，硅基集成电路技术通过晶体管和电路尺寸的小型化已经成功地满足了更高性能和更低能耗的要求。随着传统器件和材料正在接近其基本的物理极限，需要研究新的器件、电路和材料，以用于下一代逻辑、存储器、传感器和能量收集应用。在此框架下，本研究利用先进计算、电子工程、数学、物理、化学和信息论等学科的融合技术，研究新型纳米级超低功耗电子器件。这项EPSCoR计划将直接或间接地影响PI所在机构的大量学生，并通过堪萨斯城STEM联盟影响更多的当地高中生和大学预科学生，PI计划为此开发一个夏季桥梁项目，以促进纳米技术教育。从技术角度来看，该项目计划开发一种新的场效应晶体管（FET）技术，利用铁电材料在晶体管结构内部实现有效的负电容（NC）。最近有报道称，铁电材料可以提供负电容，这可以解决纳米电子学的许多挑战。虽然许多当代研究人员正在研究如何利用这种NC效应来打破现有硅基晶体管的性能和能效障碍，但提出的努力结合了新兴的基于负电容的场效应晶体管（NCFET）和传统的绝缘体上硅（SOI）技术的概念。

Over the last sixty years silicon based integrated circuit technologies have been successfully meeting the demands of higher performance and lower energy consumption through the miniaturization of the transistor and circuit dimensions. As the conventional devices and materials are now approaching their fundamental physical limits, new devices and circuits and materials need to be investigated for the next generation logic, memory, sensor and energy harvesting applications. Within this framework, the proposed research on a new nanoscale ultra-low-power electronic device makes use of convergence of technologies in advanced computing, electronic engineering, mathematics, physics, chemistry and information-theory. This EPSCoR initiative would directly or indirectly impact a large number of students of the PI's institution, and an even larger number of local high school and pre-collegiate students through the Kansas City STEM Alliance, for which the PI plans to develop a summer bridge program to promote nanotechnology education. From a technical standpoint the project plans to develop a new field effect transistor (FET) technology to achieve an effective negative capacitance (NC) inside the transistor structure by utilizing ferroelectric materials. It has recently been reported that ferroelectric materials can provide a negative capacitance that can be the solutions to many of the challenges of nanoelectronics. While many contemporary researchers are investigating ways to exploit this NC effect to break the performance and energy efficiency barriers of the existing silicon based transistors, the proposed effort combines the concept of the emerging negative capacitance based field effect transistor (NCFET) and the conventional silicon-on-insulator (SOI) technologies.