STARSS: Small: SecureDust -- The Physical Limits of Information Security

STARSS：小：SecureDust——信息安全的物理极限

• 批准号: 1619558
• 负责人: Daniel Holcomb
• 金额: $ 30.81万
• 依托单位: University of Massachusetts Amherst
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-09-01 至 2020-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1619558&HistoricalAwards=false
• 关键词: STARSS; Small; SecureDust; Physical; Limits

Truly ubiquitous computing with very small, self-powered and wirelessly networked integrated circuits will become possible within a decade. Applications of these devices include biosensors, environmental monitors, and defense, all of which bring a need for security and privacy. Enabling the use of strong cryptographic algorithms on extremely constrained devices requires rethinking, from an energy-first perspective, the design and implementation of basic cryptographic building blocks. The Secure Dust project seeks to reduce the energy of cryptographic functions in advanced technologies by an order of magnitude, and to validate the designs using test chips. The findings of this project will help to secure future ubiquitous devices and the Internet of Things.The specific research objective of this project is to explore the scaling down of security functions into advanced CMOS technologies and in particular the important role of manufacturing variations and noise that can be both advantageous (Physical Unclonable Functions and Random Number Generation) and detrimental (side-channel resistant ciphers and hash functions) depending on the cryptography block. We target an energy budget of picojoules per secure transaction, built upon basic cryptography functions. The project combines design expertise in lightweight cryptography using block ciphers, hash functions, PUFs and RNGs, along with low-energy techniques and realistic semiconductor design flows and economic realities. FPGA-prototyping and CMOS FinFET test chips will be used to demonstrate complete cryptosystem functionality, including side-channel susceptibility.

真正的无处不在的计算与非常小的，自供电和无线网络集成电路将成为可能在十年内。这些设备的应用包括生物传感器、环境监测器和国防，所有这些都带来了对安全和隐私的需求。要在极其受限的设备上使用强大的加密算法，需要从能源优先的角度重新思考基本加密构建块的设计和实现。Secure Dust项目旨在将先进技术中的加密功能的能量降低一个数量级，并使用测试芯片验证设计。该项目的研究结果将有助于确保未来无处不在的设备和物联网的安全。该项目的具体研究目标是探索将安全功能按比例缩小到先进的CMOS技术中，特别是制造变化和噪声的重要作用，这两者都是有利的。（物理不可克隆函数和随机数生成）和有害的（抗侧信道密码和散列函数），这取决于密码块。 我们的目标是每笔安全交易的能量预算为皮焦耳，建立在基本的密码学功能基础上。 该项目结合了使用分组密码、散列函数、PUF和RNG的轻量级密码学设计专业知识，沿着了低能耗技术和现实的半导体设计流程和经济现实。 FPGA原型和CMOS FinFET测试芯片将用于演示完整的密码系统功能，包括侧通道敏感性。

项目成果

Efficient Register Renaming Architectures for 8-bit AES Datapath at 0.55 pJ/bit in 16-nm FinFET

16 nm FinFET 中 0.55 pJ/位的 8 位 AES 数据路径的高效寄存器重命名架构

• DOI: 10.1109/tvlsi.2020.2999593
• 发表时间: 2020
• 期刊: IEEE Transactions on Very Large Scale Integration (VLSI
• 作者: Dhanuskodi, Siva Nishok;Allen, Samuel;Holcomb, Daniel E.
• 通讯作者: Holcomb, Daniel E.