SI2-SSE: 3DSIM: A Unified Framework for 3D CPU Co-Simulation

SI2-SSE：3DSIM：3D CPU 协同仿真的统一框架

• 批准号: 1642424
• 负责人: Ankur Srivastava
• 金额: $ 50万
• 依托单位: University of Maryland, College Park
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-01-01 至 2022-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1642424&HistoricalAwards=false
• 关键词: SI2; SSE; 3DSIM; Unified; Framework

Performance enhancements and increased energy efficiency that could be obtained by reducing the dimensions of transistors is becoming difficult. Thus, Moore's law no longer holds true for conventional approaches to chip design. Three-dimensional (3D) integration of chip components has emerged as an innovative packaging alternative to conventional approaches where multiple layers of silicon are stacked and interconnected using directly through the silicon layers (this technique is known as "Through Silicon Via" or TSV). Using TSVs and 3D packaging enables significant benefits to the performance, functionality and energy efficiency of future CPUs. However, 3D integration results in new types of interaction patterns between computing cores and between core and memory components. In addition, the close proximity between cores and memory causes their physical attributes, such as their temperature, noise of power delivery, and reliability to become uniquely interdependent. If innovations in 3D integration are to continue, substantial investment in frameworks that can simulate and evaluate 3D computer architectures are necessary. This project seeks to develop such a simulation framework and make it available to the computer architecture design community.The objective of this project is to develop a full system simulator for 3D CPUs while accounting for the architectural and physical interactions between the cores and memory components thereby allowing the co-simulation of power, performance and reliability characteristics. The framework supports a wide array of 3D CPU configurations including intricate specifications of cores, core counts, network on chip protocols, on-chip/off-chip caches, main memory and off-chip secondary storage (built using diverse set of devices including SRAM, DRAM, non volatile devices). The project is a substantial addition to the repertoire of 3D integrated circuit design and simulation frameworks and shall play a vital role in future innovations in 3D CPU architectures.

通过减小晶体管的尺寸可以获得的性能增强和增加的能量效率变得困难。因此，摩尔定律不再适用于芯片设计的传统方法。芯片组件的三维（3D）集成已经作为传统方法的创新封装替代方案出现，在传统方法中，多层硅被堆叠并使用直接穿过硅层互连（该技术被称为“硅通孔”或TSV）。使用TSV和3D封装可以显著提高未来CPU的性能、功能和能效。然而，3D集成导致计算核心之间以及核心和存储器组件之间的新型交互模式。此外，内核和内存之间的紧密接近导致它们的物理属性，例如它们的温度，功率传输的噪声和可靠性变得独特地相互依赖。如果要继续3D集成的创新，就必须在能够模拟和评估3D计算机架构的框架上进行大量投资。该项目旨在开发这样一个仿真框架，并将其提供给计算机架构设计社区。该项目的目标是开发一个完整的3D CPU系统仿真器，同时考虑内核和内存组件之间的架构和物理交互，从而允许功率，性能和可靠性特性的共同仿真。该框架支持广泛的3D CPU配置，包括复杂的内核规格、内核数量、片上网络协议、片上/片外缓存、主存储器和片外二级存储（使用包括SRAM、DRAM、非易失性设备在内的各种设备构建）。该项目是3D集成电路设计和仿真框架的重要补充，将在3D CPU架构的未来创新中发挥重要作用。

项目成果

ObfusGEM: Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design

ObfusGEM：通过安全感知片上内存和数据路径设计增强处理器设计混淆

• DOI: 10.1145/3422575.3422798
• 发表时间: 2020
• 期刊: MEMSYS
• 作者: Michael Zuzak, University of

DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator

• DOI: 10.1109/lca.2020.2973991
• 发表时间: 2020-07-01
• 期刊: IEEE COMPUTER ARCHITECTURE LETTERS
• 影响因子: 2.3
• 作者: Li, Shang;Yang, Zhiyuan;Jacob, Bruce
• 通讯作者: Jacob, Bruce

Evaluating the Security of Logic-Locked Probabilistic Circuits

评估逻辑锁定概率电路的安全性

• DOI: 10.1109/tcad.2021.3104270
• 发表时间: 2021
• 期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• 影响因子: 2.9
• 作者: Zuzak, Michael;Mondal, Ankit;Srivastava, Ankur
• 通讯作者: Srivastava, Ankur

Statistical DRAM modeling

统计 DRAM 建模

• DOI: 10.1145/3357526.3357576
• 发表时间: 2019
• 期刊: MemSYS
• 作者: Li, Shang;Jacob, Bruce
• 通讯作者: Jacob, Bruce

Main memory latency simulation: the missing link

主内存延迟模拟：缺失的环节

• DOI: 10.1145/3240302.3240317
• 发表时间: 2018
• 期刊: MEMSYS 2018
• 作者: Verdejo, Rommel Sánchez;Asifuzzaman, Kazi;Radulovic, Milan;Radojković, Petar;Ayguadé, Eduard;Jacob, Bruce
• 通讯作者: Jacob, Bruce