EAGER: Exploring the Negative Capacitance Effect from Hf-Based Ferroelectrics and 2D Nanomaterials for Low-Voltage Transistors

晶体管是每个电子设备的心脏，提供用户和他们的数据之间的连接。根据摩尔定律，随着晶体管的尺寸不断缩小，它们在计算机芯片中的使用量也相应飙升。在所有这些比例中，工作电压在十多年内基本上保持不变，对用于计算的电功率的数量产生了重大影响。在这个项目中，将展示一种将二维(2D)纳米材料和铁电材料结合在一起的新型晶体管。纳米材料是用于非常小的设备的极好的电子材料，而铁电材料使一种被称为负电容的现象成为可能。据推测，这两项进步的结合将产生能够在极低电压下运行的晶体管。这种低电压晶体管可能会开启一个“比摩尔更多”计算的新时代，比如降低由高性能晶体管运行的数据中心的功耗，通过提供一种“绿色”数据中心解决方案来满足国家对能源效率的需求。此外，还将有关于将铁电材料与纳米材料一起使用的科学学习，这将推动各种新的研究方向。该项目还将对促进教育多样性产生影响，因为一名女研究生将与一名拉丁裔研究生--美国国家科学基金会研究生研究员--一起实施该项目。此外，高中生和本科生对纳米材料的广泛兴趣使这个项目成为通过现有的和新的外展项目吸引杜克大学周围其他代表性不足的少数族裔参与的理想选择。解决硅晶体管中显著的功率问题的一个有希望的选择是利用铁电(FE)绝缘体的负电容(NC)行为来通过放大施加的栅极电势来降低操作电压。在过去的三年里，涉及NC场效应管(NC-FET)的研究活动大幅增加，这主要是因为有证据表明，在适当合成的Hfnium氧化锆(HfZrO2)薄膜中可以实现强大的FE行为。然而，具有体半导体沟道的NC-FET与FE的接口质量较差，由于FE层较厚而缺乏器件可扩展性，以及与电压相关的衬底电容导致驱动电流比传统晶体管低几个数量级。在本项目中，将利用栅堆叠中2D MoS2的独特电学和结构特性来生产2D NC-FET，从而探索解决这些极低电压NC-FET挑战的可能方案。该项目的主要目标将是证明2D通道与HfZrO2铁电材料的独特组合可以产生低于60 mV/十的开关(工作在热极限以下)。将研究几种不同的方法，包括原子层沉积合成和铁电体封顶方面的进展，以及2D沟道的转移和接触策略，以实现具有栅压放大功能的2D NC-FET。虽然在NC-FET和2DMoS2晶体管领域有大量的工作，但将这些不同领域的研究集中在这种设备上是非常不同的，并且可能具有颠覆性。低功耗、高性能2D NC-FET的成功演示将为更深入地研究该器件的独特方面的更广泛的研究和程序铺平道路。

Transistors are the heartbeat of every electronic device, providing the connection between users and their data. As the size of transistors has continued to shrink based on Moore's Law, their use by the billions in computer chips has correspondingly soared. Amidst all of this scaling, the operating voltage has remained essentially constant for more than a decade, having major ramifications on the amount of electrical power used for computing. In this project, a new type of transistor will be demonstrated that brings together two-dimensional (2D) nanomaterials and ferroelectrics. The nanomaterials are superb electronic materials for very small devices and the ferroelectrics make possible a phenomenon known as negative capacitance. It is hypothesized that the marriage of these two advances will yield transistors that can operate at extremely low voltages. Such low voltage transistors could usher in a new era of "More than Moore" computing, such as reducing the power consumption in data centers, which are run by high-performance transistors, to address the national need for energy efficiency by offering a "green" data center solution. Additionally, there will be scientific learning regarding the use of ferroelectrics with nanomaterials that will drive a variety of new research directions. This project will also be impactful in promoting educational diversity, as a female graduate student along with a Latino graduate student, who is a NSF Graduate Research Fellow, will carry it out. Further, the extensive interest in nanomaterials among high school and undergraduate students makes this project ideal for attracting involvement of other underrepresented minorities around Duke through both established and new outreach programs. One promising option for overcoming the significant power problem in silicon transistors is to use the negative capacitance (NC) behavior of ferroelectric (FE) insulators to lower the operating voltage by amplifying the applied gate potential. In the last three years, a substantial uptick in research activity involving NC field-effect transistors (NC-FETs) has occurred, largely due to the demonstration that strong FE behavior can be achieved in appropriately synthesized, hafnium zirconium oxide (HfZrO2) thin films. However, NC-FETs with bulk semiconductor channels suffer from poor interface quality to the FE, a lack of device scalability due to thick FE layers, and a voltage-dependent substrate capacitance that results in drive currents that are orders of magnitude lower than traditional transistors. In this project, a possible solution to these challenges for extremely low-voltage NC-FETs will be explored by using the unique electrical and structural properties of 2D MoS2 in the gate stack to yield 2D NC-FETs. The primary goal of the project will be to demonstrate that the unique combination of a 2D channel with HfZrO2 ferroelectrics can yield sub-60 mV/decade switching (operation below the thermal limit). Several distinct approaches will be studied, including advancements in the atomic layer deposition synthesis and capping of the ferroelectric as well as transfer and contacting strategies for the 2D channel, in order to realize a 2D NC-FET that exhibits gate voltage amplification. While there is considerable work in the field on NC-FETs as well as transistors from 2D MoS2, bringing these distinct areas of research together in this device is highly distinct and potentially disruptive. Successful demonstration of a low power, high-performance 2D NC-FET will open the way for more extensive studies and programs that research the unique aspects of this device in greater depth.