Pattern Adaptable Antenna Arrays for Networks on Chips in Massively Multicore Systems

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The goal of this project is to advance scientific computing by creating specialized on-chip antennas that can be placed inside high performance computers to allow high-speed data transfers between processor chips without using wires. This will replace hardwired interconnections and will allow rerouting of signals easily and seamlessly to improve system throughput and reliability. This may have significant impact on large-scale scientific computing and applications involving huge amounts of data processing. The antenna modules mimic "wireless-base-station-on-chip" concept since the antennas route signals inside the computer to achieve much faster and more efficient processing output. The project will demonstrate for the very first time a small compact and reconfigurable antenna module to be designed at high frequencies so they can be placed in computers. The specific frequency is chosen so that the antennas do not radiate beyond the computer itself. The research methods include designing the antenna by using simulations, and by demonstrating and testing antennas in the environment to verify that the desired goals are met. The impact of this research is to improve the capability of solving increasingly demanding computing problems in emerging scientific applications. This technology can potentially break performance barriers observed in computing and create new computing architectures. The project will integrate research with education, and provide learning opportunities merging the areas of computing, interconnects, high frequency simulations, and measurements to senior-level undergraduate students and graduate students. High school students and college freshmen will be able to explore technologies in a new freshman course module that introduces university students to different opportunities in electrical engineering. Graduate student course offerings will be enhanced with a signal integrity course for the online Masters of Science in Electrical and Computer Engineering program at the University of Arizona. Hands-on and engagement activities will be offered to train and prepare students for their future career in industry or academia.This project will create and demonstrate one of the first chip-compatible antenna arrays that allow real-time pattern adaptation for use in massively multicore computing. The antennas will be designed on a separate antenna module that includes a pattern-reconfigurable antenna to allow for redirection of the antenna patterns in the horizontal direction (chip to chip). The array will achieve at least eight unique beam positions to allow communication to neighboring cores. The antenna module has several novel components: it is thin (1-2 mm), includes a 3D (multilayer) stacked beamformer, and can be connected to a transceiver using flip-chip (solder ball bump) attachment technologies. On system level, the project will demonstrate a novel system design using reconfigurable wireless links to simplify the I/O (Input/Output) architecture and improve system reliability with reconfigurable data paths that work around broken links. The project includes developing accurate link models that takes into account antenna and propagation characteristics. This will provide for accurate network planning using details of the physical antennas such as their pattern characteristics in the operating environment, and enable optimization of the computer network topology. Prototype antennas will be fabricated and measured, and demonstration test beds using 60 GHz transceiver evaluation boards will validate the link models.