CNS: SHF: Small: Architectural Support for Efficient and Programmable Non-Volatile Main Memory

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Computer systems typically include memory and storage as separate and distinct components. Memory is fast and volatile, meaning that it loses its contents during power loss or program failure. Storage, on the other hand, is slower and non-volatile, or persistent, and keeps documents, photos, applications, and other data for long periods of time, even throughout a power loss. Historically, these components have been distinct, however, emerging memory technologies are poised to upset the status quo, combining the faster speed of memory with the persistence of storage into a single device known as non-volatile memory, or persistent memory. While this will simplify computer systems, it will also create new problems and challenges in how they function and how they are programmed. In the past, processors only interacted with memory, but they will now interact directly with storage also. Persistent memories will require new hardware support from processors, but the mechanisms that have been proposed so far incur high overheads and require programmers to reason about complex hardware-level events to use persistent memory correctly and efficiently. Some of the overheads are a direct result of waiting for data to be written to persistent memory so that the programmer can be certain that data is saved to storage. Other overheads are the result of performing this operation in a way that is failure-safe, in other words, that even if a failure occurs while updating storage the integrity of the data already in storage is preserved. In both cases, the design of the processor significantly impacts the overheads and complexity associated with using persistent memory. This project will investigate new hardware designs that make it easier for programmers to write high-performing and efficient code for future systems that use persistent main memory. This project will train Ph.D. students, undergraduate students, and Professional Masters students in the design of future computer systems with emerging persistent memory technologies. The culmination this work will be research manuscripts that report findings, infrastructure for experimentally validating the findings, and other supporting documentation and data. The manuscripts produced by this project will be submitted to high impact journals and conferences so that computer systems researchers and engineers can become aware of the findings and incorporate this knowledge into the design of future systems. This project will also support undergraduate curriculum development efforts based on the Analog Discovery 2. The research manuscripts, experimental infrastructure, and curriculum materials will be available at http://go.ncsu.edu/persistent-memory as they are produced.